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From: Shawn Sung <shawn.sung@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>, Jassi Brar <jassisinghbrar@gmail.com>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>
Cc: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Hsiao Chien Sung <shawn.sung@mediatek.com>,
	"Jason-JH . Lin" <jason-jh.lin@mediatek.com>,
	Houlong Wei <houlong.wei@mediatek.com>,
	<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>
Subject: [PATCH v5 04/10] soc: mediatek: cmdq: Add cmdq_pkt_write_s_reg_value to support write value to reg
Date: Wed, 3 Apr 2024 18:25:56 +0800	[thread overview]
Message-ID: <20240403102602.32155-5-shawn.sung@mediatek.com> (raw)
In-Reply-To: <20240403102602.32155-1-shawn.sung@mediatek.com>

From: "Jason-JH.Lin" <jason-jh.lin@mediatek.com>

Add cmdq_pkt_write_s_reg_value to support write a value to a register.

It appends write_s command to the command buffer in a CMDQ packet,
ask GCE to excute a write instruction to write a value to a register
with low 16 bits physical address offset.

Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
---
 drivers/soc/mediatek/mtk-cmdq-helper.c | 13 +++++++++++++
 include/linux/soc/mediatek/mtk-cmdq.h  | 11 +++++++++++
 2 files changed, 24 insertions(+)

diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
index 72350138591c3..42a0194198d5b 100644
--- a/drivers/soc/mediatek/mtk-cmdq-helper.c
+++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
@@ -292,6 +292,19 @@ int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx,
 }
 EXPORT_SYMBOL(cmdq_pkt_write_s_value);
 
+int cmdq_pkt_write_s_reg_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, u32 value)
+{
+	struct cmdq_instruction inst = {};
+
+	inst.op = CMDQ_CODE_WRITE_S;
+	inst.dst_t = CMDQ_REG_TYPE;
+	inst.reg_dst = high_addr_reg_idx;
+	inst.value = value;
+
+	return cmdq_pkt_append_command(pkt, inst);
+}
+EXPORT_SYMBOL(cmdq_pkt_write_s_reg_value);
+
 int cmdq_pkt_write_s_mask_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx,
 				u16 addr_low, u32 value, u32 mask)
 {
diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
index 1edb391ec604a..7bd77d40a5720 100644
--- a/include/linux/soc/mediatek/mtk-cmdq.h
+++ b/include/linux/soc/mediatek/mtk-cmdq.h
@@ -207,6 +207,17 @@ int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx,
 int cmdq_pkt_write_s_mask_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx,
 				u16 addr_low, u32 value, u32 mask);
 
+/**
+ * cmdq_pkt_write_s_reg_value() - append write_s command to the CMDQ packet which
+ *				  write value to a register with low address pa
+ * @pkt:	the CMDQ packet
+ * @high_addr_reg_idx:	internal register ID which contains high address of pa
+ * @value:	the specified target value
+ *
+ * Return: 0 for success; else the error code is returned
+ */
+int cmdq_pkt_write_s_reg_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, u32 value);
+
 /**
  * cmdq_pkt_mem_move() - append memory move command to the CMDQ packet
  * @pkt:	the CMDQ packet
-- 
2.18.0



WARNING: multiple messages have this Message-ID (diff)
From: Shawn Sung <shawn.sung@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>, Jassi Brar <jassisinghbrar@gmail.com>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>
Cc: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Hsiao Chien Sung <shawn.sung@mediatek.com>,
	"Jason-JH . Lin" <jason-jh.lin@mediatek.com>,
	Houlong Wei <houlong.wei@mediatek.com>,
	<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>
Subject: [PATCH v5 04/10] soc: mediatek: cmdq: Add cmdq_pkt_write_s_reg_value to support write value to reg
Date: Wed, 3 Apr 2024 18:25:56 +0800	[thread overview]
Message-ID: <20240403102602.32155-5-shawn.sung@mediatek.com> (raw)
In-Reply-To: <20240403102602.32155-1-shawn.sung@mediatek.com>

From: "Jason-JH.Lin" <jason-jh.lin@mediatek.com>

Add cmdq_pkt_write_s_reg_value to support write a value to a register.

It appends write_s command to the command buffer in a CMDQ packet,
ask GCE to excute a write instruction to write a value to a register
with low 16 bits physical address offset.

Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
---
 drivers/soc/mediatek/mtk-cmdq-helper.c | 13 +++++++++++++
 include/linux/soc/mediatek/mtk-cmdq.h  | 11 +++++++++++
 2 files changed, 24 insertions(+)

diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
index 72350138591c3..42a0194198d5b 100644
--- a/drivers/soc/mediatek/mtk-cmdq-helper.c
+++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
@@ -292,6 +292,19 @@ int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx,
 }
 EXPORT_SYMBOL(cmdq_pkt_write_s_value);
 
+int cmdq_pkt_write_s_reg_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, u32 value)
+{
+	struct cmdq_instruction inst = {};
+
+	inst.op = CMDQ_CODE_WRITE_S;
+	inst.dst_t = CMDQ_REG_TYPE;
+	inst.reg_dst = high_addr_reg_idx;
+	inst.value = value;
+
+	return cmdq_pkt_append_command(pkt, inst);
+}
+EXPORT_SYMBOL(cmdq_pkt_write_s_reg_value);
+
 int cmdq_pkt_write_s_mask_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx,
 				u16 addr_low, u32 value, u32 mask)
 {
diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
index 1edb391ec604a..7bd77d40a5720 100644
--- a/include/linux/soc/mediatek/mtk-cmdq.h
+++ b/include/linux/soc/mediatek/mtk-cmdq.h
@@ -207,6 +207,17 @@ int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx,
 int cmdq_pkt_write_s_mask_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx,
 				u16 addr_low, u32 value, u32 mask);
 
+/**
+ * cmdq_pkt_write_s_reg_value() - append write_s command to the CMDQ packet which
+ *				  write value to a register with low address pa
+ * @pkt:	the CMDQ packet
+ * @high_addr_reg_idx:	internal register ID which contains high address of pa
+ * @value:	the specified target value
+ *
+ * Return: 0 for success; else the error code is returned
+ */
+int cmdq_pkt_write_s_reg_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, u32 value);
+
 /**
  * cmdq_pkt_mem_move() - append memory move command to the CMDQ packet
  * @pkt:	the CMDQ packet
-- 
2.18.0


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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2024-04-03 10:26 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-03 10:25 [PATCH v5 00/10] Add CMDQ secure driver for SVP Shawn Sung
2024-04-03 10:25 ` Shawn Sung
2024-04-03 10:25 ` [PATCH v5 01/10] dt-bindings: gce: mt8195: Add CMDQ_SYNC_TOKEN_SECURE_THR_EOF event id Shawn Sung
2024-04-03 10:25   ` Shawn Sung
2024-04-03 10:25 ` [PATCH v5 02/10] dt-bindings: mailbox: Add mboxes property for CMDQ secure driver Shawn Sung
2024-04-03 10:25   ` Shawn Sung
2024-04-03 11:43   ` Rob Herring
2024-04-03 11:43     ` Rob Herring
2024-04-03 15:46   ` Conor Dooley
2024-04-03 15:46     ` Conor Dooley
2024-04-04  4:31     ` Jason-JH Lin (林睿祥)
2024-04-04  4:31       ` Jason-JH Lin (林睿祥)
2024-04-04 14:52       ` Conor Dooley
2024-04-04 14:52         ` Conor Dooley
2024-04-05 14:33         ` Jason-JH Lin (林睿祥)
2024-04-05 14:33           ` Jason-JH Lin (林睿祥)
2024-04-05 16:13           ` Conor Dooley
2024-04-05 16:13             ` Conor Dooley
2024-04-06 16:15             ` Jason-JH Lin (林睿祥)
2024-04-06 16:15               ` Jason-JH Lin (林睿祥)
2024-04-09 17:52               ` Conor Dooley
2024-04-09 17:52                 ` Conor Dooley
2024-04-12  9:00                 ` Jason-JH Lin (林睿祥)
2024-04-12  9:00                   ` Jason-JH Lin (林睿祥)
2024-04-15 16:53                   ` Conor Dooley
2024-04-15 16:53                     ` Conor Dooley
2024-04-03 10:25 ` [PATCH v5 03/10] soc: mediatek: cmdq: Add cmdq_pkt_logic_command to support math operation Shawn Sung
2024-04-03 10:25   ` Shawn Sung
2024-04-03 10:25 ` Shawn Sung [this message]
2024-04-03 10:25   ` [PATCH v5 04/10] soc: mediatek: cmdq: Add cmdq_pkt_write_s_reg_value to support write value to reg Shawn Sung
2024-04-03 10:25 ` [PATCH v5 05/10] mailbox: mtk-cmdq: Support GCE loop packets in interrupt handler Shawn Sung
2024-04-03 10:25   ` Shawn Sung
2024-04-03 10:25 ` [PATCH v5 06/10] soc: mediatek: cmdq: Add cmdq_pkt_finalize_loop for looping cmd with irq Shawn Sung
2024-04-03 10:25   ` Shawn Sung
2024-04-03 10:25 ` [PATCH v5 07/10] mailbox: mediatek: Move reuseable definition to header for secure driver Shawn Sung
2024-04-03 10:25   ` Shawn Sung
2024-04-03 10:26 ` [PATCH v5 08/10] mailbox: mediatek: Add CMDQ secure mailbox driver Shawn Sung
2024-04-03 10:26   ` Shawn Sung
2024-04-03 10:26 ` [PATCH v5 09/10] mailbox: mediatek: Add secure CMDQ driver support for CMDQ driver Shawn Sung
2024-04-03 10:26   ` Shawn Sung
2024-04-03 10:26 ` [PATCH v5 10/10] drm/mediatek: Add interface to allocate MediaTek GEM buffer Shawn Sung
2024-04-03 10:26   ` Shawn Sung

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