From: BALATON Zoltan <balaton@eik.bme.hu>
To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: Nicholas Piggin <npiggin@gmail.com>,
Peter Maydell <peter.maydell@linaro.org>,
philmd@linaro.org
Subject: [PATCH for-9.0] ppc440_pcix: Do not expose a bridge device on PCI bus
Date: Wed, 10 Apr 2024 01:55:43 +0200 (CEST) [thread overview]
Message-ID: <20240409235543.0E0C34E601C@zero.eik.bme.hu> (raw)
Real 460EX SoC apparently does not expose a bridge device and having
it appear on PCI bus confuses an AmigaOS file system driver that uses
this to detect which machine it is running on. Since values written
here by firmware are never read, just ignore these writes and drop the
bridge device.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
This is only used by sam460ex and this fixes an issue with AmigaOS on
this machine so I'd like this to be merged for 9.0 please.
hw/pci-host/ppc440_pcix.c | 14 +-------------
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/hw/pci-host/ppc440_pcix.c b/hw/pci-host/ppc440_pcix.c
index 1926ae2a27..ba38172989 100644
--- a/hw/pci-host/ppc440_pcix.c
+++ b/hw/pci-host/ppc440_pcix.c
@@ -52,7 +52,6 @@ OBJECT_DECLARE_SIMPLE_TYPE(PPC440PCIXState, PPC440_PCIX_HOST)
struct PPC440PCIXState {
PCIHostState parent_obj;
- PCIDevice *dev;
struct PLBOutMap pom[PPC440_PCIX_NR_POMS];
struct PLBInMap pim[PPC440_PCIX_NR_PIMS];
uint32_t sts;
@@ -170,10 +169,6 @@ static void ppc440_pcix_reg_write4(void *opaque, hwaddr addr,
trace_ppc440_pcix_reg_write(addr, val, size);
switch (addr) {
- case PCI_VENDOR_ID ... PCI_MAX_LAT:
- stl_le_p(s->dev->config + addr, val);
- break;
-
case PCIX0_POM0LAL:
s->pom[0].la &= 0xffffffff00000000ULL;
s->pom[0].la |= val;
@@ -301,10 +296,6 @@ static uint64_t ppc440_pcix_reg_read4(void *opaque, hwaddr addr,
uint32_t val;
switch (addr) {
- case PCI_VENDOR_ID ... PCI_MAX_LAT:
- val = ldl_le_p(s->dev->config + addr);
- break;
-
case PCIX0_POM0LAL:
val = s->pom[0].la;
break;
@@ -498,10 +489,7 @@ static void ppc440_pcix_realize(DeviceState *dev, Error **errp)
memory_region_init(&s->iomem, OBJECT(dev), "pci-io", 64 * KiB);
h->bus = pci_register_root_bus(dev, NULL, ppc440_pcix_set_irq,
ppc440_pcix_map_irq, &s->irq, &s->busmem, &s->iomem,
- PCI_DEVFN(0, 0), 1, TYPE_PCI_BUS);
-
- s->dev = pci_create_simple(h->bus, PCI_DEVFN(0, 0),
- TYPE_PPC4xx_HOST_BRIDGE);
+ PCI_DEVFN(1, 0), 1, TYPE_PCI_BUS);
memory_region_init(&s->bm, OBJECT(s), "bm-ppc440-pcix", UINT64_MAX);
memory_region_add_subregion(&s->bm, 0x0, &s->busmem);
--
2.30.9
next reply other threads:[~2024-04-09 23:56 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-09 23:55 BALATON Zoltan [this message]
2024-04-10 4:38 ` [PATCH for-9.0] ppc440_pcix: Do not expose a bridge device on PCI bus Nicholas Piggin
2024-04-10 11:03 ` BALATON Zoltan
2024-04-16 2:26 ` Nicholas Piggin
2024-04-16 9:43 ` BALATON Zoltan
2024-04-17 2:09 ` Nicholas Piggin
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