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From: Andrew Jones <ajones@ventanamicro.com>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH v3 6/6] KVM: riscv: selftests: Add Zawrs extension to get-reg-list test
Date: Fri, 26 Apr 2024 12:08:26 +0200	[thread overview]
Message-ID: <20240426100820.14762-14-ajones@ventanamicro.com> (raw)
In-Reply-To: <20240426100820.14762-8-ajones@ventanamicro.com>

KVM RISC-V allows the Zawrs extension for the Guest/VM, so add it
to the get-reg-list test.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
 tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c
index b882b7b9b785..8c4c27bd4b88 100644
--- a/tools/testing/selftests/kvm/riscv/get-reg-list.c
+++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c
@@ -48,6 +48,7 @@ bool filter_reg(__u64 reg)
 	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVNAPOT:
 	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVPBMT:
 	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZACAS:
+	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZAWRS:
 	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBA:
 	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBB:
 	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBC:
@@ -413,6 +414,7 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off)
 		KVM_ISA_EXT_ARR(SVNAPOT),
 		KVM_ISA_EXT_ARR(SVPBMT),
 		KVM_ISA_EXT_ARR(ZACAS),
+		KVM_ISA_EXT_ARR(ZAWRS),
 		KVM_ISA_EXT_ARR(ZBA),
 		KVM_ISA_EXT_ARR(ZBB),
 		KVM_ISA_EXT_ARR(ZBC),
@@ -936,6 +938,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(svinval, SVINVAL);
 KVM_ISA_EXT_SIMPLE_CONFIG(svnapot, SVNAPOT);
 KVM_ISA_EXT_SIMPLE_CONFIG(svpbmt, SVPBMT);
 KVM_ISA_EXT_SIMPLE_CONFIG(zacas, ZACAS);
+KVM_ISA_EXT_SIMPLE_CONFIG(zawrs, ZAWRS);
 KVM_ISA_EXT_SIMPLE_CONFIG(zba, ZBA);
 KVM_ISA_EXT_SIMPLE_CONFIG(zbb, ZBB);
 KVM_ISA_EXT_SIMPLE_CONFIG(zbc, ZBC);
@@ -991,6 +994,7 @@ struct vcpu_reg_list *vcpu_configs[] = {
 	&config_svnapot,
 	&config_svpbmt,
 	&config_zacas,
+	&config_zawrs,
 	&config_zba,
 	&config_zbb,
 	&config_zbc,
-- 
2.44.0



WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <ajones@ventanamicro.com>
To: linux-riscv@lists.infradead.org, kvm-riscv@lists.infradead.org,
	devicetree@vger.kernel.org
Cc: paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, conor.dooley@microchip.com,
	anup@brainfault.org, atishp@atishpatra.org, robh@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
	christoph.muellner@vrull.eu, heiko@sntech.de,
	charlie@rivosinc.com, David.Laight@ACULAB.COM,
	parri.andrea@gmail.com, luxu.kernel@bytedance.com
Subject: [PATCH v3 6/6] KVM: riscv: selftests: Add Zawrs extension to get-reg-list test
Date: Fri, 26 Apr 2024 12:08:26 +0200	[thread overview]
Message-ID: <20240426100820.14762-14-ajones@ventanamicro.com> (raw)
In-Reply-To: <20240426100820.14762-8-ajones@ventanamicro.com>

KVM RISC-V allows the Zawrs extension for the Guest/VM, so add it
to the get-reg-list test.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
 tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c
index b882b7b9b785..8c4c27bd4b88 100644
--- a/tools/testing/selftests/kvm/riscv/get-reg-list.c
+++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c
@@ -48,6 +48,7 @@ bool filter_reg(__u64 reg)
 	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVNAPOT:
 	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVPBMT:
 	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZACAS:
+	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZAWRS:
 	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBA:
 	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBB:
 	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBC:
@@ -413,6 +414,7 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off)
 		KVM_ISA_EXT_ARR(SVNAPOT),
 		KVM_ISA_EXT_ARR(SVPBMT),
 		KVM_ISA_EXT_ARR(ZACAS),
+		KVM_ISA_EXT_ARR(ZAWRS),
 		KVM_ISA_EXT_ARR(ZBA),
 		KVM_ISA_EXT_ARR(ZBB),
 		KVM_ISA_EXT_ARR(ZBC),
@@ -936,6 +938,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(svinval, SVINVAL);
 KVM_ISA_EXT_SIMPLE_CONFIG(svnapot, SVNAPOT);
 KVM_ISA_EXT_SIMPLE_CONFIG(svpbmt, SVPBMT);
 KVM_ISA_EXT_SIMPLE_CONFIG(zacas, ZACAS);
+KVM_ISA_EXT_SIMPLE_CONFIG(zawrs, ZAWRS);
 KVM_ISA_EXT_SIMPLE_CONFIG(zba, ZBA);
 KVM_ISA_EXT_SIMPLE_CONFIG(zbb, ZBB);
 KVM_ISA_EXT_SIMPLE_CONFIG(zbc, ZBC);
@@ -991,6 +994,7 @@ struct vcpu_reg_list *vcpu_configs[] = {
 	&config_svnapot,
 	&config_svpbmt,
 	&config_zacas,
+	&config_zawrs,
 	&config_zba,
 	&config_zbb,
 	&config_zbc,
-- 
2.44.0


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <ajones@ventanamicro.com>
To: linux-riscv@lists.infradead.org, kvm-riscv@lists.infradead.org,
	devicetree@vger.kernel.org
Cc: paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, conor.dooley@microchip.com,
	anup@brainfault.org, atishp@atishpatra.org, robh@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
	christoph.muellner@vrull.eu, heiko@sntech.de,
	charlie@rivosinc.com, David.Laight@ACULAB.COM,
	parri.andrea@gmail.com, luxu.kernel@bytedance.com
Subject: [PATCH v3 6/6] KVM: riscv: selftests: Add Zawrs extension to get-reg-list test
Date: Fri, 26 Apr 2024 12:08:26 +0200	[thread overview]
Message-ID: <20240426100820.14762-14-ajones@ventanamicro.com> (raw)
In-Reply-To: <20240426100820.14762-8-ajones@ventanamicro.com>

KVM RISC-V allows the Zawrs extension for the Guest/VM, so add it
to the get-reg-list test.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
 tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c
index b882b7b9b785..8c4c27bd4b88 100644
--- a/tools/testing/selftests/kvm/riscv/get-reg-list.c
+++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c
@@ -48,6 +48,7 @@ bool filter_reg(__u64 reg)
 	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVNAPOT:
 	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVPBMT:
 	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZACAS:
+	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZAWRS:
 	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBA:
 	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBB:
 	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBC:
@@ -413,6 +414,7 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off)
 		KVM_ISA_EXT_ARR(SVNAPOT),
 		KVM_ISA_EXT_ARR(SVPBMT),
 		KVM_ISA_EXT_ARR(ZACAS),
+		KVM_ISA_EXT_ARR(ZAWRS),
 		KVM_ISA_EXT_ARR(ZBA),
 		KVM_ISA_EXT_ARR(ZBB),
 		KVM_ISA_EXT_ARR(ZBC),
@@ -936,6 +938,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(svinval, SVINVAL);
 KVM_ISA_EXT_SIMPLE_CONFIG(svnapot, SVNAPOT);
 KVM_ISA_EXT_SIMPLE_CONFIG(svpbmt, SVPBMT);
 KVM_ISA_EXT_SIMPLE_CONFIG(zacas, ZACAS);
+KVM_ISA_EXT_SIMPLE_CONFIG(zawrs, ZAWRS);
 KVM_ISA_EXT_SIMPLE_CONFIG(zba, ZBA);
 KVM_ISA_EXT_SIMPLE_CONFIG(zbb, ZBB);
 KVM_ISA_EXT_SIMPLE_CONFIG(zbc, ZBC);
@@ -991,6 +994,7 @@ struct vcpu_reg_list *vcpu_configs[] = {
 	&config_svnapot,
 	&config_svpbmt,
 	&config_zacas,
+	&config_zawrs,
 	&config_zba,
 	&config_zbb,
 	&config_zbc,
-- 
2.44.0


  parent reply	other threads:[~2024-04-26 10:08 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-26 10:08 [PATCH v3 0/6] riscv: Apply Zawrs when available Andrew Jones
2024-04-26 10:08 ` Andrew Jones
2024-04-26 10:08 ` Andrew Jones
2024-04-26 10:08 ` [PATCH v3 1/6] riscv: Provide a definition for 'pause' Andrew Jones
2024-04-26 10:08   ` Andrew Jones
2024-04-26 10:08   ` Andrew Jones
2024-04-26 10:08 ` [PATCH v3 2/6] dt-bindings: riscv: Add Zawrs ISA extension description Andrew Jones
2024-04-26 10:08   ` Andrew Jones
2024-04-26 10:08   ` Andrew Jones
2024-04-26 16:41   ` Conor Dooley
2024-04-26 16:41     ` Conor Dooley
2024-04-26 16:41     ` Conor Dooley
2024-04-26 10:08 ` [PATCH v3 3/6] riscv: Add Zawrs support for spinlocks Andrew Jones
2024-04-26 10:08   ` Andrew Jones
2024-04-26 10:08   ` Andrew Jones
2024-07-29 13:43   ` Alexandre Ghiti
2024-07-29 13:43     ` Alexandre Ghiti
2024-07-29 13:43     ` Alexandre Ghiti
2024-07-29 14:01     ` Andrew Jones
2024-07-29 14:01       ` Andrew Jones
2024-07-29 14:01       ` Andrew Jones
2024-07-29 14:30       ` Alexandre Ghiti
2024-07-29 14:30         ` Alexandre Ghiti
2024-07-29 14:30         ` Alexandre Ghiti
2024-04-26 10:08 ` [PATCH v3 4/6] riscv: hwprobe: export Zawrs ISA extension Andrew Jones
2024-04-26 10:08   ` Andrew Jones
2024-04-26 10:08   ` Andrew Jones
2024-06-18 13:48   ` Clément Léger
2024-06-18 13:48     ` Clément Léger
2024-06-18 13:48     ` Clément Léger
2024-06-18 16:01     ` Andrew Jones
2024-06-18 16:01       ` Andrew Jones
2024-06-18 16:01       ` Andrew Jones
2024-06-18 16:59       ` Conor Dooley
2024-06-18 16:59         ` Conor Dooley
2024-06-18 16:59         ` Conor Dooley
2024-06-18 17:05         ` Andrew Jones
2024-06-18 17:05           ` Andrew Jones
2024-06-18 17:05           ` Andrew Jones
2024-06-18 17:34           ` Conor Dooley
2024-06-18 17:34             ` Conor Dooley
2024-06-18 17:34             ` Conor Dooley
2024-07-15 15:45   ` Palmer Dabbelt
2024-07-15 15:45     ` Palmer Dabbelt
2024-07-15 15:45     ` Palmer Dabbelt
2024-04-26 10:08 ` [PATCH v3 5/6] KVM: riscv: Support guest wrs.nto Andrew Jones
2024-04-26 10:08   ` Andrew Jones
2024-04-26 10:08   ` Andrew Jones
2024-06-26 15:36   ` Anup Patel
2024-06-26 15:36     ` Anup Patel
2024-06-26 15:36     ` Anup Patel
2024-04-26 10:08 ` Andrew Jones [this message]
2024-04-26 10:08   ` [PATCH v3 6/6] KVM: riscv: selftests: Add Zawrs extension to get-reg-list test Andrew Jones
2024-04-26 10:08   ` Andrew Jones
2024-06-26 15:37   ` Anup Patel
2024-06-26 15:37     ` Anup Patel
2024-06-26 15:37     ` Anup Patel
2024-06-03 12:36 ` [PATCH v3 0/6] riscv: Apply Zawrs when available Andrew Jones
2024-06-03 12:36   ` Andrew Jones
2024-06-03 12:36   ` Andrew Jones
2024-06-26 14:34   ` Palmer Dabbelt
2024-06-26 14:34     ` Palmer Dabbelt
2024-06-26 14:34     ` Palmer Dabbelt
2024-06-26 15:19     ` Andrew Jones
2024-06-26 15:19       ` Andrew Jones
2024-06-26 15:19       ` Andrew Jones
2024-06-26 15:38     ` Anup Patel
2024-06-26 15:38       ` Anup Patel
2024-06-26 15:38       ` Anup Patel
2024-07-14 20:30 ` patchwork-bot+linux-riscv
2024-07-14 20:30   ` patchwork-bot+linux-riscv
2024-07-14 20:30   ` patchwork-bot+linux-riscv

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