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From: David Vernet <void@manifault.com>
To: Dave Thaler <dthaler1968=40googlemail.com@dmarc.ietf.org>
Cc: bpf@vger.kernel.org, bpf@ietf.org,
	Dave Thaler <dthaler1968@gmail.com>,
	Dave Thaler <dthaler1968@googlemail.com>
Subject: Re: [Bpf] [PATCH bpf-next v2] bpf, docs: Clarify PC use in instruction-set.rst
Date: Fri, 26 Apr 2024 15:58:31 -0500	[thread overview]
Message-ID: <20240426205831.GA21308@maniforge> (raw)
In-Reply-To: <20240426201828.4365-1-dthaler1968@gmail.com>

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On Fri, Apr 26, 2024 at 01:18:28PM -0700, Dave Thaler wrote:
> This patch elaborates on the use of PC by expanding the PC acronym,
> explaining the units, and the relative position to which the offset
> applies.
> 
> v1->v2: reword per feedback from Alexei
> 
> Signed-off-by: Dave Thaler <dthaler1968@googlemail.com>
> ---
>  Documentation/bpf/standardization/instruction-set.rst | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
> index b44bdacd0..766f57636 100644
> --- a/Documentation/bpf/standardization/instruction-set.rst
> +++ b/Documentation/bpf/standardization/instruction-set.rst
> @@ -469,6 +469,12 @@ JSLT      0xc    any      PC += offset if dst < src          signed
>  JSLE      0xd    any      PC += offset if dst <= src         signed
>  ========  =====  =======  =================================  ===================================================
>  
> +where 'PC' denotes the program counter, and the offset to increment by
> +is in units of 64-bit instructions relative to the instruction following
> +the jump instruction.  Thus 'PC += 1' skips execution of the next
> +instruction if it's a basic instruction and fails verification if the
> +next instruction is a 128-bit wide instruction.

Should we say "results in undefined behavior" rather than "fails
verification"? I'm not sure if we should be dictating verifier semantics
in the ISA document.

> +
>  The BPF program needs to store the return value into register R0 before doing an
>  ``EXIT``.
>  
> -- 
> 2.40.1
> 
> -- 
> Bpf mailing list
> Bpf@ietf.org
> https://www.ietf.org/mailman/listinfo/bpf

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WARNING: multiple messages have this Message-ID (diff)
From: David Vernet <void@manifault.com>
To: Dave Thaler <dthaler1968=40googlemail.com@dmarc.ietf.org>
Cc: bpf@vger.kernel.org, bpf@ietf.org,
	Dave Thaler <dthaler1968@gmail.com>,
	Dave Thaler <dthaler1968@googlemail.com>
Subject: Re: [Bpf] [PATCH bpf-next v2] bpf, docs: Clarify PC use in instruction-set.rst
Date: Fri, 26 Apr 2024 15:58:31 -0500	[thread overview]
Message-ID: <20240426205831.GA21308@maniforge> (raw)
Message-ID: <20240426205831.1J65VrkTsHqBIjm35ZS0YUBpMD_purI7Ry0Si0A7nTI@z> (raw)
In-Reply-To: <20240426201828.4365-1-dthaler1968@gmail.com>


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On Fri, Apr 26, 2024 at 01:18:28PM -0700, Dave Thaler wrote:
> This patch elaborates on the use of PC by expanding the PC acronym,
> explaining the units, and the relative position to which the offset
> applies.
> 
> v1->v2: reword per feedback from Alexei
> 
> Signed-off-by: Dave Thaler <dthaler1968@googlemail.com>
> ---
>  Documentation/bpf/standardization/instruction-set.rst | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
> index b44bdacd0..766f57636 100644
> --- a/Documentation/bpf/standardization/instruction-set.rst
> +++ b/Documentation/bpf/standardization/instruction-set.rst
> @@ -469,6 +469,12 @@ JSLT      0xc    any      PC += offset if dst < src          signed
>  JSLE      0xd    any      PC += offset if dst <= src         signed
>  ========  =====  =======  =================================  ===================================================
>  
> +where 'PC' denotes the program counter, and the offset to increment by
> +is in units of 64-bit instructions relative to the instruction following
> +the jump instruction.  Thus 'PC += 1' skips execution of the next
> +instruction if it's a basic instruction and fails verification if the
> +next instruction is a 128-bit wide instruction.

Should we say "results in undefined behavior" rather than "fails
verification"? I'm not sure if we should be dictating verifier semantics
in the ISA document.

> +
>  The BPF program needs to store the return value into register R0 before doing an
>  ``EXIT``.
>  
> -- 
> 2.40.1
> 
> -- 
> Bpf mailing list
> Bpf@ietf.org
> https://www.ietf.org/mailman/listinfo/bpf

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-- 
Bpf mailing list
Bpf@ietf.org
https://www.ietf.org/mailman/listinfo/bpf

  reply	other threads:[~2024-04-26 20:58 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-26 20:18 [PATCH bpf-next v2] bpf, docs: Clarify PC use in instruction-set.rst Dave Thaler
2024-04-26 20:18 ` [Bpf] " Dave Thaler
2024-04-26 20:58 ` David Vernet [this message]
2024-04-26 20:58   ` David Vernet

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