Re: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock

From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Alexander Stein <alexander.stein@ew.tq-group.com>
Cc: linux-arm-kernel@lists.infradead.org, Marek Vasut <marex@denx.de>,
	Conor Dooley <conor+dt@kernel.org>,
	Fabio Estevam <festevam@gmail.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Paul Elder <paul.elder@ideasonboard.com>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Rob Herring <robh@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Shawn Guo <shawnguo@kernel.org>,
	devicetree@vger.kernel.org, imx@lists.linux.dev
Subject: Re: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
Date: Fri, 3 May 2024 16:45:57 +0300	[thread overview]
Message-ID: <20240503134557.GC13904@pendragon.ideasonboard.com> (raw)
In-Reply-To: <3311352.aeNJFYEL58@steina-w>

On Fri, May 03, 2024 at 02:58:19PM +0200, Alexander Stein wrote:
> Am Mittwoch, 17. April 2024, 11:12:04 CEST schrieb Alexander Stein:
> > Am Dienstag, 16. April 2024, 16:19:10 CEST schrieb Marek Vasut:
> > > Configure both CSI2 assigned-clock-rates the same way.
> > > There does not seem to be any reason for keeping the
> > > two CSI2 pixel clock set to different frequencies.
> > > 
> > > This also reduces first CSI2 clock from overdrive mode
> > > frequency which is 500 MHz down below the regular mode
> > > frequency of 400 MHz.
> > > 
> > > Signed-off-by: Marek Vasut <marex@denx.de>
> > 
> > Apparently there is no difference when using imx415 (3840x2160) sensor.
> 
> Just for the records: While this change does not affect imx415 (3840x2160)
> processing, reducing clock-frequency as well (v3) imx415 does not work.
> So I assume that for this image size a higher than default frequency is
> required.

For the time being I expect sensor overlays to override the default
clock setup. Ideally the clock frequencies should be configured
automatically at runtime by the CSI-2 RX driver.

> > Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> > 
> > > ---
> > > Cc: Conor Dooley <conor+dt@kernel.org>
> > > Cc: Fabio Estevam <festevam@gmail.com>
> > > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> > > Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > > Cc: Paul Elder <paul.elder@ideasonboard.com>
> > > Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> > > Cc: Rob Herring <robh@kernel.org>
> > > Cc: Sascha Hauer <s.hauer@pengutronix.de>
> > > Cc: Shawn Guo <shawnguo@kernel.org>
> > > Cc: devicetree@vger.kernel.org
> > > Cc: imx@lists.linux.dev
> > > Cc: linux-arm-kernel@lists.infradead.org
> > > ---
> > > V2: Align both clock to 266 MHz and update commit message
> > > ---
> > >  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > 
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > index 1bb96e96639f2..7883f5c056f4e 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > @@ -1667,7 +1667,7 @@ mipi_csi_0: csi@32e40000 {
> > >  						  <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
> > >  				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
> > >  							 <&clk IMX8MP_CLK_24M>;
> > > -				assigned-clock-rates = <500000000>;
> > > +				assigned-clock-rates = <266000000>;
> > >  				power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
> > >  				status = "disabled";
> > >  
> > > 

-- 
Regards,

Laurent Pinchart