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From: Hal Feng <hal.feng@starfivetech.com>
To: "Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Jiri Slaby" <jirislaby@kernel.org>,
	"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>
Cc: Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	Hal Feng <hal.feng@starfivetech.com>,
	devicetree@vger.kernel.org, linux-serial@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH v1 0/3] Add the core reset for UARTs of StarFive JH7110
Date: Fri, 17 May 2024 14:17:10 +0800	[thread overview]
Message-ID: <20240517061713.95803-1-hal.feng@starfivetech.com> (raw)

The UART of StarFive JH7110 needs two reset signals (apb, core) to
initialize. This patch series adds the missing core reset.

Hal Feng (3):
  dt-bindings: serial: snps-dw-apb-uart: Add one more reset signal for
    StarFive JH7110 SoC
  serial: 8250_dw: Use reset array API to get resets
  riscv: dts: starfive: jh7110: Add the core reset and jh7110 compatible
    for uarts

 .../bindings/serial/snps-dw-apb-uart.yaml     | 14 ++++++++-
 arch/riscv/boot/dts/starfive/jh7110.dtsi      | 30 +++++++++++--------
 drivers/tty/serial/8250/8250_dw.c             |  2 +-
 3 files changed, 32 insertions(+), 14 deletions(-)


base-commit: a38297e3fb012ddfa7ce0321a7e5a8daeb1872b6
-- 
2.43.2


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WARNING: multiple messages have this Message-ID (diff)
From: Hal Feng <hal.feng@starfivetech.com>
To: "Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Jiri Slaby" <jirislaby@kernel.org>,
	"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>
Cc: Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	Hal Feng <hal.feng@starfivetech.com>,
	devicetree@vger.kernel.org, linux-serial@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH v1 0/3] Add the core reset for UARTs of StarFive JH7110
Date: Fri, 17 May 2024 14:17:10 +0800	[thread overview]
Message-ID: <20240517061713.95803-1-hal.feng@starfivetech.com> (raw)

The UART of StarFive JH7110 needs two reset signals (apb, core) to
initialize. This patch series adds the missing core reset.

Hal Feng (3):
  dt-bindings: serial: snps-dw-apb-uart: Add one more reset signal for
    StarFive JH7110 SoC
  serial: 8250_dw: Use reset array API to get resets
  riscv: dts: starfive: jh7110: Add the core reset and jh7110 compatible
    for uarts

 .../bindings/serial/snps-dw-apb-uart.yaml     | 14 ++++++++-
 arch/riscv/boot/dts/starfive/jh7110.dtsi      | 30 +++++++++++--------
 drivers/tty/serial/8250/8250_dw.c             |  2 +-
 3 files changed, 32 insertions(+), 14 deletions(-)


base-commit: a38297e3fb012ddfa7ce0321a7e5a8daeb1872b6
-- 
2.43.2


             reply	other threads:[~2024-05-17  6:17 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-17  6:17 Hal Feng [this message]
2024-05-17  6:17 ` [PATCH v1 0/3] Add the core reset for UARTs of StarFive JH7110 Hal Feng
2024-05-17  6:17 ` [PATCH v1 1/3] dt-bindings: serial: snps-dw-apb-uart: Add one more reset signal for StarFive JH7110 SoC Hal Feng
2024-05-17  6:17   ` Hal Feng
2024-05-17 16:16   ` Conor Dooley
2024-05-17 16:16     ` Conor Dooley
2024-05-20  2:06     ` Hal Feng
2024-05-20  2:06       ` Hal Feng
2024-05-17  6:17 ` [PATCH v1 2/3] serial: 8250_dw: Use reset array API to get resets Hal Feng
2024-05-17  6:17   ` Hal Feng
2024-05-17  6:17 ` [PATCH v1 3/3] riscv: dts: starfive: jh7110: Add the core reset and jh7110 compatible for uarts Hal Feng
2024-05-17  6:17   ` Hal Feng

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