Re: [PATCH 3/8] dt-bindings: soc: intel: lgm-syscon: Move to dedicated schema

From: Rob Herring <robh@kernel.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Lee Jones <lee@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Lars Povlsen <lars.povlsen@microchip.com>,
	Steen Hegelund <Steen.Hegelund@microchip.com>,
	Daniel Machon <daniel.machon@microchip.com>,
	UNGLinuxDriver@microchip.com, Nishanth Menon <nm@ti.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	Jiaxun Yang <jiaxun.yang@flygoat.com>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org
Subject: Re: [PATCH 3/8] dt-bindings: soc: intel: lgm-syscon: Move to dedicated schema
Date: Mon, 20 May 2024 16:07:29 -0500	[thread overview]
Message-ID: <20240520210729.GA1509114-robh@kernel.org> (raw)
In-Reply-To: <20240519-dt-bindings-mfd-syscon-split-v1-3-aaf996e2313a@linaro.org>

On Sun, May 19, 2024 at 08:42:18PM +0200, Krzysztof Kozlowski wrote:
> intel,lgm-syscon is not a simple syscon device - it has children - thus
> it should be fully documented in its own binding.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> 
> ---
> 
> Context might depend on
> https://lore.kernel.org/r/20240510123018.3902184-1-robh@kernel.org
> and also further patches here depend on this one.
> ---
>  Documentation/devicetree/bindings/mfd/syscon.yaml  |  1 -
>  .../bindings/soc/intel/intel,lgm-syscon.yaml       | 53 ++++++++++++++++++++++
>  2 files changed, 53 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
> index 622ea0f1b08e..5a0aeae24a50 100644
> --- a/Documentation/devicetree/bindings/mfd/syscon.yaml
> +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
> @@ -77,7 +77,6 @@ properties:
>                - hisilicon,pcie-sas-subctrl
>                - hisilicon,peri-subctrl
>                - hpe,gxp-sysreg
> -              - intel,lgm-syscon
>                - loongson,ls1b-syscon
>                - loongson,ls1c-syscon
>                - lsi,axxia-syscon
> diff --git a/Documentation/devicetree/bindings/soc/intel/intel,lgm-syscon.yaml b/Documentation/devicetree/bindings/soc/intel/intel,lgm-syscon.yaml
> new file mode 100644
> index 000000000000..aa8d24074fd7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/intel/intel,lgm-syscon.yaml
> @@ -0,0 +1,53 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/intel/intel,lgm-syscon.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Intel Lightning Mountain(LGM) Syscon
> +
> +maintainers:
> +  - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
> +
> +properties:
> +  compatible:
> +    items:
> +      - const: intel,lgm-syscon
> +      - const: syscon
> +
> +  reg:
> +    maxItems: 1
> +
> +  "#address-cells":
> +    const: 1
> +
> +  "#size-cells":
> +    const: 1

Should have ranges.

> +
> +patternProperties:
> +  "^emmc-phy@[0-9a-f]+$":
> +    $ref: /schemas/phy/intel,lgm-emmc-phy.yaml#
> +
> +required:
> +  - compatible
> +  - reg
> +  - "#address-cells"
> +  - "#size-cells"
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    chiptop@e0200000 {
> +        compatible = "intel,lgm-syscon", "syscon";
> +        reg = <0xe0200000 0x100>;
> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +
> +        emmc-phy@a8 {
> +            compatible = "intel,lgm-emmc-phy";
> +            reg = <0x00a8 0x10>;
> +            clocks = <&emmc>;
> +            #phy-cells = <0>;
> +        };
> +    };
> 
> -- 
> 2.43.0
> 