From: Zhenzhong Duan <zhenzhong.duan@intel.com>
To: qemu-devel@nongnu.org
Cc: alex.williamson@redhat.com, clg@redhat.com,
eric.auger@redhat.com, mst@redhat.com, peterx@redhat.com,
jasowang@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com,
joao.m.martins@oracle.com, clement.mathieu--drif@eviden.com,
kevin.tian@intel.com, yi.l.liu@intel.com, chao.p.peng@intel.com,
Zhenzhong Duan <zhenzhong.duan@intel.com>
Subject: [PATCH rfcv2 00/17] intel_iommu: Enable stage-1 translation for emulated device
Date: Wed, 22 May 2024 14:22:56 +0800 [thread overview]
Message-ID: <20240522062313.453317-1-zhenzhong.duan@intel.com> (raw)
Hi,
Per Jason Wang's suggestion, iommufd nesting series[1] is split into
"Enable stage-1 translation for emulated device" series and
"Enable stage-1 translation for passthrough device" series.
This series enables stage-1 translation support for emulated device
in intel iommu which we called "modern" mode.
PATCH1-5: Some preparing work before support stage-1 translation
PATCH6-8: Implement stage-1 translation for emulated device
PATCH9-14: Emulate iotlb invalidation of stage-1 mapping
PATCH15: Set default aw_bits to 48 in scalable modren mode
PATCH16: Introduce "modern" mode to distinguish with legacy mode
PATCH17: Add qtest
Qemu code can be found at [2]
[1] https://lists.gnu.org/archive/html/qemu-devel/2024-01/msg02740.html
[2] https://github.com/yiliu1765/qemu/tree/zhenzhong/iommufd_stage1_emu_rfcv2
Thanks
Zhenzhong
Changelog:
v2:
- split from nesting series (Jason)
- merged some commits from Clement
- add qtest (jason)
Clément Mathieu--Drif (5):
intel_iommu: check if the input address is canonical
intel_iommu: set accessed and dirty bits during first stage
translation
intel_iommu: Extract device IOTLB invalidation logic
intel_iommu: add an internal API to find an address space with PASID
intel_iommu: add support for PASID-based device IOTLB invalidation
Yi Liu (3):
intel_iommu: Rename slpte to pte
intel_iommu: Implement stage-1 translation
intel_iommu: Modify x-scalable-mode to be string option
Yu Zhang (1):
intel_iommu: Update version to 3.0 and add the latest fault reasons
Zhenzhong Duan (8):
intel_iommu: Make pasid entry type check accurate
intel_iommu: Add a placeholder variable for scalable modern mode
intel_iommu: Flush stage-2 cache in PADID-selective PASID-based iotlb
invalidation
intel_iommu: Flush stage-1 cache in iotlb invalidation
intel_iommu: Process PASID-based iotlb invalidation
intel_iommu: piotlb invalidation should notify unmap
intel_iommu: Set default aw_bits to 48 in scalable modren mode
tests/qtest: Add intel-iommu test
MAINTAINERS | 1 +
hw/i386/intel_iommu_internal.h | 60 +++-
include/hw/i386/intel_iommu.h | 5 +-
hw/i386/intel_iommu.c | 639 ++++++++++++++++++++++++++++-----
tests/qtest/intel-iommu-test.c | 63 ++++
tests/qtest/meson.build | 1 +
6 files changed, 676 insertions(+), 93 deletions(-)
create mode 100644 tests/qtest/intel-iommu-test.c
--
2.34.1
next reply other threads:[~2024-05-22 6:26 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-22 6:22 Zhenzhong Duan [this message]
2024-05-22 6:22 ` [PATCH rfcv2 01/17] intel_iommu: Update version to 3.0 and add the latest fault reasons Zhenzhong Duan
2024-05-22 6:22 ` [PATCH rfcv2 02/17] intel_iommu: Make pasid entry type check accurate Zhenzhong Duan
2024-05-22 6:22 ` [PATCH rfcv2 03/17] intel_iommu: Add a placeholder variable for scalable modern mode Zhenzhong Duan
2024-05-22 6:23 ` [PATCH rfcv2 04/17] intel_iommu: Flush stage-2 cache in PADID-selective PASID-based iotlb invalidation Zhenzhong Duan
2024-05-22 6:23 ` [PATCH rfcv2 05/17] intel_iommu: Rename slpte to pte Zhenzhong Duan
2024-05-22 6:23 ` [PATCH rfcv2 06/17] intel_iommu: Implement stage-1 translation Zhenzhong Duan
2024-05-24 13:57 ` CLEMENT MATHIEU--DRIF
2024-05-27 3:17 ` Duan, Zhenzhong
2024-05-22 6:23 ` [PATCH rfcv2 07/17] intel_iommu: check if the input address is canonical Zhenzhong Duan
2024-05-22 6:23 ` [PATCH rfcv2 08/17] intel_iommu: set accessed and dirty bits during first stage translation Zhenzhong Duan
2024-05-22 6:23 ` [PATCH rfcv2 09/17] intel_iommu: Flush stage-1 cache in iotlb invalidation Zhenzhong Duan
2024-05-24 13:57 ` CLEMENT MATHIEU--DRIF
2024-05-27 3:17 ` Duan, Zhenzhong
2024-05-22 6:23 ` [PATCH rfcv2 10/17] intel_iommu: Process PASID-based " Zhenzhong Duan
2024-05-22 6:23 ` [PATCH rfcv2 11/17] intel_iommu: Extract device IOTLB invalidation logic Zhenzhong Duan
2024-05-22 6:23 ` [PATCH rfcv2 12/17] intel_iommu: add an internal API to find an address space with PASID Zhenzhong Duan
2024-05-22 6:23 ` [PATCH rfcv2 13/17] intel_iommu: add support for PASID-based device IOTLB invalidation Zhenzhong Duan
2024-05-22 6:23 ` [PATCH rfcv2 14/17] intel_iommu: piotlb invalidation should notify unmap Zhenzhong Duan
2024-05-22 6:23 ` [PATCH rfcv2 15/17] intel_iommu: Set default aw_bits to 48 in scalable modren mode Zhenzhong Duan
2024-05-24 13:56 ` CLEMENT MATHIEU--DRIF
2024-05-27 3:16 ` Duan, Zhenzhong
2024-05-27 5:14 ` CLEMENT MATHIEU--DRIF
2024-05-22 6:23 ` [PATCH rfcv2 16/17] intel_iommu: Modify x-scalable-mode to be string option Zhenzhong Duan
2024-05-22 6:23 ` [PATCH rfcv2 17/17] tests/qtest: Add intel-iommu test Zhenzhong Duan
2024-05-22 12:46 ` Thomas Huth
2024-05-23 9:46 ` Duan, Zhenzhong
2024-05-22 8:10 ` [PATCH rfcv2 00/17] intel_iommu: Enable stage-1 translation for emulated device Jason Wang
2024-05-23 9:35 ` Duan, Zhenzhong
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