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From: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
To: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	 Paul Walmsley <paul.walmsley@sifive.com>,
	 Chen Wang <unicorn_wang@outlook.com>,
	Inochi Amaoto <inochiama@outlook.com>,
	 Chao Wei <chao.wei@sophgo.com>
Cc: "Albert Ou" <aou@eecs.berkeley.edu>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Samuel Holland" <samuel.holland@sifive.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Daniel Lezcano" <daniel.lezcano@linaro.org>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Miquèl Raynal" <miquel.raynal@bootlin.com>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org,
	"Thomas Bonnefille" <thomas.bonnefille@bootlin.com>
Subject: [PATCH 4/5] riscv: dts: sophgo: Add initial SG2002 SoC device tree
Date: Mon, 27 May 2024 12:28:20 +0200	[thread overview]
Message-ID: <20240527-sg2002-v1-4-1b6cb38ce8f4@bootlin.com> (raw)
In-Reply-To: <20240527-sg2002-v1-0-1b6cb38ce8f4@bootlin.com>

Add initial device tree for the SG2002 RISC-V SoC by SOPHGO.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
---
 arch/riscv/boot/dts/sophgo/sg2002.dtsi | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/riscv/boot/dts/sophgo/sg2002.dtsi b/arch/riscv/boot/dts/sophgo/sg2002.dtsi
new file mode 100644
index 000000000000..b266357cb5c0
--- /dev/null
+++ b/arch/riscv/boot/dts/sophgo/sg2002.dtsi
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2024 Thomas Bonnefille <thomas.bonnefille@bootlin.com>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "cv18xx.dtsi"
+
+/ {
+	compatible = "sophgo,sg2002";
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0x80000000 0x10000000>;
+	};
+};
+
+&plic {
+	compatible = "sophgo,sg2002-plic", "thead,c900-plic";
+};
+
+&clint {
+	compatible = "sophgo,sg2002-clint", "thead,c900-clint";
+};
+
+&clk {
+	compatible = "sophgo,sg2000-clk";
+};

-- 
2.45.1


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WARNING: multiple messages have this Message-ID (diff)
From: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
To: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	 Paul Walmsley <paul.walmsley@sifive.com>,
	 Chen Wang <unicorn_wang@outlook.com>,
	Inochi Amaoto <inochiama@outlook.com>,
	 Chao Wei <chao.wei@sophgo.com>
Cc: "Albert Ou" <aou@eecs.berkeley.edu>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Samuel Holland" <samuel.holland@sifive.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Daniel Lezcano" <daniel.lezcano@linaro.org>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Miquèl Raynal" <miquel.raynal@bootlin.com>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org,
	"Thomas Bonnefille" <thomas.bonnefille@bootlin.com>
Subject: [PATCH 4/5] riscv: dts: sophgo: Add initial SG2002 SoC device tree
Date: Mon, 27 May 2024 12:28:20 +0200	[thread overview]
Message-ID: <20240527-sg2002-v1-4-1b6cb38ce8f4@bootlin.com> (raw)
In-Reply-To: <20240527-sg2002-v1-0-1b6cb38ce8f4@bootlin.com>

Add initial device tree for the SG2002 RISC-V SoC by SOPHGO.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
---
 arch/riscv/boot/dts/sophgo/sg2002.dtsi | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/riscv/boot/dts/sophgo/sg2002.dtsi b/arch/riscv/boot/dts/sophgo/sg2002.dtsi
new file mode 100644
index 000000000000..b266357cb5c0
--- /dev/null
+++ b/arch/riscv/boot/dts/sophgo/sg2002.dtsi
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2024 Thomas Bonnefille <thomas.bonnefille@bootlin.com>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "cv18xx.dtsi"
+
+/ {
+	compatible = "sophgo,sg2002";
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0x80000000 0x10000000>;
+	};
+};
+
+&plic {
+	compatible = "sophgo,sg2002-plic", "thead,c900-plic";
+};
+
+&clint {
+	compatible = "sophgo,sg2002-clint", "thead,c900-clint";
+};
+
+&clk {
+	compatible = "sophgo,sg2000-clk";
+};

-- 
2.45.1


  parent reply	other threads:[~2024-05-27 10:28 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-27 10:28 [PATCH 0/5] Add board support for Sipeed LicheeRV Nano Thomas Bonnefille
2024-05-27 10:28 ` Thomas Bonnefille
2024-05-27 10:28 ` [PATCH 1/5] dt-bindings: interrupt-controller: Add SOPHGO SG2002 plic Thomas Bonnefille
2024-05-27 10:28   ` Thomas Bonnefille
2024-05-27 16:39   ` Conor Dooley
2024-05-27 16:39     ` Conor Dooley
2024-06-17  0:36   ` Yixun Lan
2024-06-17  0:36     ` Yixun Lan
2024-06-17  3:33     ` Inochi Amaoto
2024-06-17  3:33       ` Inochi Amaoto
2024-06-17  8:03       ` Conor Dooley
2024-06-17  8:03         ` Conor Dooley
2024-05-27 10:28 ` [PATCH 2/5] dt-bindings: timer: Add SOPHGO SG2002 clint Thomas Bonnefille
2024-05-27 10:28   ` Thomas Bonnefille
2024-05-27 16:39   ` Conor Dooley
2024-05-27 16:39     ` Conor Dooley
2024-05-27 10:28 ` [PATCH 3/5] dt-bindings: riscv: Add Sipeed LicheeRV Nano board compatibles Thomas Bonnefille
2024-05-27 10:28   ` Thomas Bonnefille
2024-05-27 16:40   ` Conor Dooley
2024-05-27 16:40     ` Conor Dooley
2024-05-27 10:28 ` Thomas Bonnefille [this message]
2024-05-27 10:28   ` [PATCH 4/5] riscv: dts: sophgo: Add initial SG2002 SoC device tree Thomas Bonnefille
2024-05-27 10:28 ` [PATCH 5/5] riscv: dts: sophgo: Add LicheeRV Nano board " Thomas Bonnefille
2024-05-27 10:28   ` Thomas Bonnefille
2024-05-27 16:41   ` Conor Dooley
2024-05-27 16:41     ` Conor Dooley
2024-05-27 18:12   ` Thomas Bonnefille
2024-05-27 18:12     ` Thomas Bonnefille
2024-05-27 22:25   ` Inochi Amaoto
2024-05-27 22:25     ` Inochi Amaoto
2024-06-10  7:30     ` Thomas Bonnefille
2024-06-10  7:30       ` Thomas Bonnefille
2024-06-10  7:38       ` Inochi Amaoto
2024-06-10  7:38         ` Inochi Amaoto
2024-05-29  0:57   ` kernel test robot
2024-05-29  0:57     ` kernel test robot
2024-05-28 17:41 ` [PATCH 0/5] Add board support for Sipeed LicheeRV Nano Rob Herring (Arm)
2024-05-28 17:41   ` Rob Herring (Arm)

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