Re: [PATCH v2 1/6] riscv: dts: sophgo: Put sdhci compatible in dt of specific SoC

From: Yixun Lan <dlan@gentoo.org>
To: Inochi Amaoto <inochiama@outlook.com>
Cc: "Jisheng Zhang" <jszhang@kernel.org>,
	"Thomas Bonnefille" <thomas.bonnefille@bootlin.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Chen Wang" <unicorn_wang@outlook.com>,
	"Chao Wei" <chao.wei@sophgo.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Samuel Holland" <samuel.holland@sifive.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Daniel Lezcano" <daniel.lezcano@linaro.org>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Miquèl Raynal" <miquel.raynal@bootlin.com>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH v2 1/6] riscv: dts: sophgo: Put sdhci compatible in dt of specific SoC
Date: Sun, 16 Jun 2024 23:58:29 +0000	[thread overview]
Message-ID: <20240616235829.GA4000183@ofsar> (raw)
In-Reply-To: <IA1PR20MB49534C9E29E86B478205E4B3BBC02@IA1PR20MB4953.namprd20.prod.outlook.com>

Hi

On 18:47 Wed 12 Jun     , Inochi Amaoto wrote:
> On Wed, Jun 12, 2024 at 10:02:31AM GMT, Thomas Bonnefille wrote:
> > Remove SDHCI compatible for CV1800b from common dtsi file to put it in
> > the specific dtsi file of the CV1800b.
> > This commits aims at following the same guidelines as in the other nodes
> > of the CV18XX family.
is there any URL of guideline? or did I miss anything
couldn't find any discussion about this in v1

> > 
> > Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
> > ---
> >  arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 4 ++++
> >  arch/riscv/boot/dts/sophgo/cv18xx.dtsi  | 1 -
> >  2 files changed, 4 insertions(+), 1 deletion(-)
> > 
> > diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > index ec9530972ae2..b9cd51457b4c 100644
> > --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > @@ -25,3 +25,7 @@ &clint {
> >  &clk {
> >  	compatible = "sophgo,cv1800-clk";
> >  };
> > +
> > +&sdhci0 {
> > +	compatible = "sophgo,cv1800b-dwcmshc";
> > +};
> > diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> > index 891932ae470f..7247c7c3013c 100644
> > --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> > +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> > @@ -288,7 +288,6 @@ uart4: serial@41c0000 {
> >  		};
> >  
> >  		sdhci0: mmc@4310000 {
> > -			compatible = "sophgo,cv1800b-dwcmshc";
> >  			reg = <0x4310000 0x1000>;
> >  			interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
> >  			clocks = <&clk CLK_AXI4_SD0>,
> > 
> > -- 
> > 2.45.2
> > 
> 
> Hi, Jisheng,
> 
> Is this change necessary? IIRC, the sdhci is the same across 
> the whole series.
I tend to agree with Inochi here, if it's same across all SoC, then no bother to
split, it will cause more trouble to maintain..

> 
> Regards,
> Inochi

-- 
Yixun Lan (dlan)
Gentoo Linux Developer
GPG Key ID AABEFD55

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