From: Andrew Jones <ajones@ventanamicro.com>
To: Samuel Holland <samuel.holland@sifive.com>
Cc: "Palmer Dabbelt" <palmer@dabbelt.com>,
linux-riscv@lists.infradead.org,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Andy Chiu" <andy.chiu@sifive.com>,
"Charlie Jenkins" <charlie@rivosinc.com>,
"Clément Léger" <cleger@rivosinc.com>,
"Conor Dooley" <conor@kernel.org>,
"Evan Green" <evan@rivosinc.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH -fixes] riscv: cpufeature: Do not drop Linux-internal extensions
Date: Thu, 18 Jul 2024 16:57:07 -0500 [thread overview]
Message-ID: <20240718-a5097a4070f457529d2fff91@orel> (raw)
In-Reply-To: <20240718213011.2600150-1-samuel.holland@sifive.com>
On Thu, Jul 18, 2024 at 02:29:59PM GMT, Samuel Holland wrote:
> The Linux-internal Xlinuxenvcfg ISA extension is omitted from the
> riscv_isa_ext array because it has no DT binding and should not appear
> in /proc/cpuinfo. The logic added in commit 625034abd52a ("riscv: add
> ISA extensions validation callback") assumes all extensions are included
> in riscv_isa_ext, and so riscv_resolve_isa() wrongly drops Xlinuxenvcfg
> from the final ISA string. Instead, accept such Linux-internal ISA
> extensions as if they have no validation callback.
This assumes we'll never need a validation callback for a Linux-internal
ISA extension. We can make that assumption now and change our mind
later, but we could also add Xlinuxenvcfg to riscv_isa_ext now and
modify the places where it matters (just print_isa?). If we add
Xlinuxenvcfg to the array with a NULL name then we could do something
like
print_isa()
{
for (...) {
...
if (!riscv_isa_ext[i].name)
continue;
}
}
>
> Fixes: 625034abd52a ("riscv: add ISA extensions validation callback")
> Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
> ---
>
> arch/riscv/kernel/cpufeature.c | 14 ++++++--------
> 1 file changed, 6 insertions(+), 8 deletions(-)
>
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index 0366dc3baf33..dd25677d60de 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -457,28 +457,26 @@ static void __init riscv_resolve_isa(unsigned long *source_isa,
> bitmap_copy(prev_resolved_isa, resolved_isa, RISCV_ISA_EXT_MAX);
> for_each_set_bit(bit, source_isa, RISCV_ISA_EXT_MAX) {
> ext = riscv_get_isa_ext_data(bit);
> - if (!ext)
> - continue;
>
> - if (ext->validate) {
> + if (ext && ext->validate) {
> ret = ext->validate(ext, resolved_isa);
> if (ret == -EPROBE_DEFER) {
> loop = true;
> continue;
> } else if (ret) {
> /* Disable the extension entirely */
> - clear_bit(ext->id, source_isa);
> + clear_bit(bit, source_isa);
> continue;
> }
> }
>
> - set_bit(ext->id, resolved_isa);
> + set_bit(bit, resolved_isa);
> /* No need to keep it in source isa now that it is enabled */
> - clear_bit(ext->id, source_isa);
> + clear_bit(bit, source_isa);
>
> /* Single letter extensions get set in hwcap */
> - if (ext->id < RISCV_ISA_EXT_BASE)
> - *this_hwcap |= isa2hwcap[ext->id];
> + if (bit < RISCV_ISA_EXT_BASE)
> + *this_hwcap |= isa2hwcap[bit];
> }
> } while (loop && memcmp(prev_resolved_isa, resolved_isa, sizeof(prev_resolved_isa)));
> }
> --
> 2.45.1
>
If we'd rather leave Xlinuxenvcfg out of the array (and generally support
extensions not in the array), then LGTM
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Thanks,
drew
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <ajones@ventanamicro.com>
To: Samuel Holland <samuel.holland@sifive.com>
Cc: "Palmer Dabbelt" <palmer@dabbelt.com>,
linux-riscv@lists.infradead.org,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Andy Chiu" <andy.chiu@sifive.com>,
"Charlie Jenkins" <charlie@rivosinc.com>,
"Clément Léger" <cleger@rivosinc.com>,
"Conor Dooley" <conor@kernel.org>,
"Evan Green" <evan@rivosinc.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH -fixes] riscv: cpufeature: Do not drop Linux-internal extensions
Date: Thu, 18 Jul 2024 16:57:07 -0500 [thread overview]
Message-ID: <20240718-a5097a4070f457529d2fff91@orel> (raw)
In-Reply-To: <20240718213011.2600150-1-samuel.holland@sifive.com>
On Thu, Jul 18, 2024 at 02:29:59PM GMT, Samuel Holland wrote:
> The Linux-internal Xlinuxenvcfg ISA extension is omitted from the
> riscv_isa_ext array because it has no DT binding and should not appear
> in /proc/cpuinfo. The logic added in commit 625034abd52a ("riscv: add
> ISA extensions validation callback") assumes all extensions are included
> in riscv_isa_ext, and so riscv_resolve_isa() wrongly drops Xlinuxenvcfg
> from the final ISA string. Instead, accept such Linux-internal ISA
> extensions as if they have no validation callback.
This assumes we'll never need a validation callback for a Linux-internal
ISA extension. We can make that assumption now and change our mind
later, but we could also add Xlinuxenvcfg to riscv_isa_ext now and
modify the places where it matters (just print_isa?). If we add
Xlinuxenvcfg to the array with a NULL name then we could do something
like
print_isa()
{
for (...) {
...
if (!riscv_isa_ext[i].name)
continue;
}
}
>
> Fixes: 625034abd52a ("riscv: add ISA extensions validation callback")
> Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
> ---
>
> arch/riscv/kernel/cpufeature.c | 14 ++++++--------
> 1 file changed, 6 insertions(+), 8 deletions(-)
>
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index 0366dc3baf33..dd25677d60de 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -457,28 +457,26 @@ static void __init riscv_resolve_isa(unsigned long *source_isa,
> bitmap_copy(prev_resolved_isa, resolved_isa, RISCV_ISA_EXT_MAX);
> for_each_set_bit(bit, source_isa, RISCV_ISA_EXT_MAX) {
> ext = riscv_get_isa_ext_data(bit);
> - if (!ext)
> - continue;
>
> - if (ext->validate) {
> + if (ext && ext->validate) {
> ret = ext->validate(ext, resolved_isa);
> if (ret == -EPROBE_DEFER) {
> loop = true;
> continue;
> } else if (ret) {
> /* Disable the extension entirely */
> - clear_bit(ext->id, source_isa);
> + clear_bit(bit, source_isa);
> continue;
> }
> }
>
> - set_bit(ext->id, resolved_isa);
> + set_bit(bit, resolved_isa);
> /* No need to keep it in source isa now that it is enabled */
> - clear_bit(ext->id, source_isa);
> + clear_bit(bit, source_isa);
>
> /* Single letter extensions get set in hwcap */
> - if (ext->id < RISCV_ISA_EXT_BASE)
> - *this_hwcap |= isa2hwcap[ext->id];
> + if (bit < RISCV_ISA_EXT_BASE)
> + *this_hwcap |= isa2hwcap[bit];
> }
> } while (loop && memcmp(prev_resolved_isa, resolved_isa, sizeof(prev_resolved_isa)));
> }
> --
> 2.45.1
>
If we'd rather leave Xlinuxenvcfg out of the array (and generally support
extensions not in the array), then LGTM
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Thanks,
drew
next prev parent reply other threads:[~2024-07-18 21:57 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-18 21:29 [PATCH -fixes] riscv: cpufeature: Do not drop Linux-internal extensions Samuel Holland
2024-07-18 21:29 ` Samuel Holland
2024-07-18 21:34 ` Samuel Holland
2024-07-18 21:34 ` Samuel Holland
2024-07-18 21:57 ` Andrew Jones [this message]
2024-07-18 21:57 ` Andrew Jones
2024-07-19 7:11 ` Clément Léger
2024-07-19 7:11 ` Clément Léger
2024-07-19 8:25 ` Conor Dooley
2024-07-19 8:25 ` Conor Dooley
2024-07-19 8:34 ` Clément Léger
2024-07-19 8:34 ` Clément Léger
2024-07-29 22:25 ` Samuel Holland
2024-07-29 22:25 ` Samuel Holland
2024-07-31 18:00 ` patchwork-bot+linux-riscv
2024-07-31 18:00 ` patchwork-bot+linux-riscv
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