* Re: [PATCH v2 06/14] arm64: dts: rockchip: enable sata1+2 on Qnap-TS433
@ 2024-07-21 20:17 kernel test robot
0 siblings, 0 replies; 3+ messages in thread
From: kernel test robot @ 2024-07-21 20:17 UTC (permalink / raw)
To: oe-kbuild; +Cc: lkp
::::::
:::::: Manual check reason: "dtcheck: binding changes may go via different trees"
::::::
BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20240721173723.919961-7-heiko@sntech.de>
References: <20240721173723.919961-7-heiko@sntech.de>
TO: Heiko Stuebner <heiko@sntech.de>
TO: heiko@sntech.de
CC: ukleinek@debian.org
CC: linux-arm-kernel@lists.infradead.org
CC: linux-rockchip@lists.infradead.org
CC: linux-kernel@vger.kernel.org
Hi Heiko,
kernel test robot noticed the following build warnings:
[auto build test WARNING on rockchip/for-next]
[also build test WARNING on linus/master v6.10 next-20240719]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Heiko-Stuebner/arm64-dts-rockchip-add-PCIe-supply-regulator-to-Qnap-TS433/20240722-014202
base: https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git for-next
patch link: https://lore.kernel.org/r/20240721173723.919961-7-heiko%40sntech.de
patch subject: [PATCH v2 06/14] arm64: dts: rockchip: enable sata1+2 on Qnap-TS433
:::::: branch date: 2 hours ago
:::::: commit date: 2 hours ago
config: arm64-randconfig-051-20240722 (https://download.01.org/0day-ci/archive/20240722/202407220417.lc5cYQg8-lkp@intel.com/config)
compiler: clang version 19.0.0git (https://github.com/llvm/llvm-project ad154281230d83ee551e12d5be48bb956ef47ed3)
dtschema version: 2024.6.dev4+g23441a4
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240722/202407220417.lc5cYQg8-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/r/202407220417.lc5cYQg8-lkp@intel.com/
dtcheck warnings: (new ones prefixed by >>)
>> arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dtb: sata@fc400000: Unevaluated properties are not allowed ('power-domains' was unexpected)
from schema $id: http://devicetree.org/schemas/ata/rockchip,dwc-ahci.yaml#
>> arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dtb: sata@fc800000: Unevaluated properties are not allowed ('power-domains' was unexpected)
from schema $id: http://devicetree.org/schemas/ata/rockchip,dwc-ahci.yaml#
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 3+ messages in thread* [PATCH v2 00/14] Expand available features on Qnap TS433
@ 2024-07-21 17:37 Heiko Stuebner
2024-07-21 17:37 ` Heiko Stuebner
0 siblings, 1 reply; 3+ messages in thread
From: Heiko Stuebner @ 2024-07-21 17:37 UTC (permalink / raw)
To: heiko; +Cc: ukleinek, linux-arm-kernel, linux-rockchip, linux-kernel
Thanks to the nicely supported rk3568, the hardest part for adding things,
is to pull things from the vendor-kernel and translating them to mainline
standards.
This series allows the TS433 to use all 4 bays [0], wiggle some LEDs and
access devices connected to all 3 usb ports.
The device runs stable now and might be usable for actual usage.
There is still a todo-list though:
- the ethernet mac address for the realtek chip seems correct,
but the gmac0 interface currently uses a wrong one
- i2cdetect reports devices on i2c-1 on addresses 54,55,56,57
model_Q0B20_Q0B30_10_10.conf from the original rescue image labels them
VPD_MB = I2C:0x54, VPD_BP = I2C:0x56
the meaning currently being unknown. Some eeprom maybe?
- The regulator tree is slightly dubious. Everthing seems to follow rk3568
reference designs, but especially the regulator labeled vcc3v3_sd
seems to supply some PCIe functionality. So I guess the device's
schematics will look quite different than the regulators added to the
vendor devicetree.
- Quite a bit of functionality is provided by the MCU connected to uart0.
According to the model.conf there should be fan-control, a number of
additional LEDs (status,locate,usb?)
Thanks to Qnap engineers adding an easily accessible header for maskrom
mode on the board, replacing the bootloader is also quite a breeze. A
branch on top of today's u-boot master branch can be found on [1]. I'll
submit that code to u-boot once I can cherry-pick the dts patches.
changes in v2:
- add patches for tsadc, gpio-keys, cpu-supply, pmic, gpu and io-domains
[0] I only have two drives right now, but I tested both the internal
sata connector as well as the PCIe connected sata controller in different
combinations.
[1] https://github.com/mmind/u-boot-rockchip/tree/dev/qnap-ts433/v2024.07
Heiko Stuebner (14):
arm64: dts: rockchip: add PCIe supply regulator to Qnap-TS433
arm64: dts: rockchip: enable second PCIe controller on the Qnap-TS433
arm64: dts: rockchip: enable uart0 on Qnap-TS433
arm64: dts: rockchip: enable usb ports on Qnap-TS433
arm64: dts: rockchip: add stdout path on Qnap-TS433
arm64: dts: rockchip: enable sata1+2 on Qnap-TS433
arm64: dts: rockchip: add board-aliases for Qnap-TS433
arm64: dts: rockchip: add hdd leds to Qnap-TS433
arm64: dts: rockchip: enable the tsadc on the Qnap-TS433
arm64: dts: rockchip: add gpio-keys to Qnap-TS433
arm64: dts: rockchip: define cpu-supply on the Qnap-TS433
arm64: dts: rockchip: add missing pmic information on Qnap-TS433
arm64: dts: rockchip: enable gpu on Qnap-TS433
arm64: dts: rockchip: add 2 pmu_io_domain supplies for Qnap-TS433
.../boot/dts/rockchip/rk3568-qnap-ts433.dts | 539 +++++++++++++++++-
1 file changed, 536 insertions(+), 3 deletions(-)
--
2.39.2
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Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 3+ messages in thread* [PATCH v2 06/14] arm64: dts: rockchip: enable sata1+2 on Qnap-TS433
2024-07-21 17:37 [PATCH v2 00/14] Expand available features on Qnap TS433 Heiko Stuebner
@ 2024-07-21 17:37 ` Heiko Stuebner
0 siblings, 0 replies; 3+ messages in thread
From: Heiko Stuebner @ 2024-07-21 17:37 UTC (permalink / raw)
To: heiko; +Cc: ukleinek, linux-arm-kernel, linux-rockchip, linux-kernel
The TS433 has 4 bays. The last two are accessed via a pci-connected
sata controller, while the first two are accessed via the rk3568's
sata controllers. Enable these two now.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3568-qnap-ts433.dts | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
index 4fbbdb735eb58..69bed01cbe4ed 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
@@ -80,6 +80,16 @@ &combphy0 {
status = "okay";
};
+/* connected to sata1 */
+&combphy1 {
+ status = "okay";
+};
+
+/* connected to sata2 */
+&combphy2 {
+ status = "okay";
+};
+
&gmac0 {
assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
@@ -154,6 +164,14 @@ vcc5v0_otg_en: vcc5v0-otg-en {
};
};
+&sata1 {
+ status = "okay";
+};
+
+&sata2 {
+ status = "okay";
+};
+
&sdhci {
bus-width = <8>;
max-frequency = <200000000>;
--
2.39.2
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 3+ messages in thread* [PATCH v2 06/14] arm64: dts: rockchip: enable sata1+2 on Qnap-TS433
@ 2024-07-21 17:37 ` Heiko Stuebner
0 siblings, 0 replies; 3+ messages in thread
From: Heiko Stuebner @ 2024-07-21 17:37 UTC (permalink / raw)
To: heiko; +Cc: ukleinek, linux-arm-kernel, linux-rockchip, linux-kernel
The TS433 has 4 bays. The last two are accessed via a pci-connected
sata controller, while the first two are accessed via the rk3568's
sata controllers. Enable these two now.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3568-qnap-ts433.dts | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
index 4fbbdb735eb58..69bed01cbe4ed 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
@@ -80,6 +80,16 @@ &combphy0 {
status = "okay";
};
+/* connected to sata1 */
+&combphy1 {
+ status = "okay";
+};
+
+/* connected to sata2 */
+&combphy2 {
+ status = "okay";
+};
+
&gmac0 {
assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
@@ -154,6 +164,14 @@ vcc5v0_otg_en: vcc5v0-otg-en {
};
};
+&sata1 {
+ status = "okay";
+};
+
+&sata2 {
+ status = "okay";
+};
+
&sdhci {
bus-width = <8>;
max-frequency = <200000000>;
--
2.39.2
^ permalink raw reply related [flat|nested] 3+ messages in thread
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2024-07-21 20:17 [PATCH v2 06/14] arm64: dts: rockchip: enable sata1+2 on Qnap-TS433 kernel test robot
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2024-07-21 17:37 [PATCH v2 00/14] Expand available features on Qnap TS433 Heiko Stuebner
2024-07-21 17:37 ` [PATCH v2 06/14] arm64: dts: rockchip: enable sata1+2 on Qnap-TS433 Heiko Stuebner
2024-07-21 17:37 ` Heiko Stuebner
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