Re: [PATCH v2 8/8] arm64: dts: qcom: x1e80100-crd: enable SDX65 modem

Re: [PATCH v2 8/8] arm64: dts: qcom: x1e80100-crd: enable SDX65 modem

[kernel test robot]

:::::: 
:::::: Manual check reason: "dtcheck: binding changes may go via different trees"
:::::: 

BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20240722094249.26471-9-johan+linaro@kernel.org>
References: <20240722094249.26471-9-johan+linaro@kernel.org>
TO: Johan Hovold <johan+linaro@kernel.org>
TO: Bjorn Andersson <andersson@kernel.org>
TO: Konrad Dybcio <konrad.dybcio@linaro.org>
CC: Rob Herring <robh@kernel.org>
CC: Krzysztof Kozlowski <krzk@kernel.org>
CC: Conor Dooley <conor+dt@kernel.org>
CC: Sibi Sankar <quic_sibis@quicinc.com>
CC: Abel Vesa <abel.vesa@linaro.org>
CC: Rajendra Nayak <quic_rjendra@quicinc.com>
CC: linux-arm-msm@vger.kernel.org
CC: devicetree@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: Johan Hovold <johan+linaro@kernel.org>

Hi Johan,

kernel test robot noticed the following build warnings:

[auto build test WARNING on linus/master]
[also build test WARNING on next-20240722]
[cannot apply to robh/for-next v6.10]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Johan-Hovold/arm64-dts-qcom-x1e80100-crd-fix-PCIe4-PHY-supply/20240722-180159
base:   linus/master
patch link:    https://lore.kernel.org/r/20240722094249.26471-9-johan%2Blinaro%40kernel.org
patch subject: [PATCH v2 8/8] arm64: dts: qcom: x1e80100-crd: enable SDX65 modem
:::::: branch date: 12 hours ago
:::::: commit date: 12 hours ago
config: arm64-randconfig-051-20240723 (https://download.01.org/0day-ci/archive/20240723/202407230553.RaPVIdtg-lkp@intel.com/config)
compiler: clang version 19.0.0git (https://github.com/llvm/llvm-project ad154281230d83ee551e12d5be48bb956ef47ed3)
dtschema version: 2024.6.dev4+g23441a4
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240723/202407230553.RaPVIdtg-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/r/202407230553.RaPVIdtg-lkp@intel.com/

dtcheck warnings: (new ones prefixed by >>)
   arch/arm64/boot/dts/qcom/x1e80100.dtsi:3995.11-4005.7: Warning (graph_child_address): /soc@0/usb@a2f8800/usb@a200000/ports: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary
   arch/arm64/boot/dts/qcom/x1e80100-crd.dtb: domain-idle-states: cluster-sleep-0: 'idle-state-name' does not match any of the regexes: 'pinctrl-[0-9]+'
   	from schema $id: http://devicetree.org/schemas/power/domain-idle-state.yaml#
   arch/arm64/boot/dts/qcom/x1e80100-crd.dtb: domain-idle-states: cluster-sleep-1: 'idle-state-name' does not match any of the regexes: 'pinctrl-[0-9]+'
   	from schema $id: http://devicetree.org/schemas/power/domain-idle-state.yaml#
   arch/arm64/boot/dts/qcom/x1e80100-crd.dtb: pci@1bf8000: Unevaluated properties are not allowed ('vddpe-3v3-supply' was unexpected)
   	from schema $id: http://devicetree.org/schemas/pci/qcom,pcie-x1e80100.yaml#
>> arch/arm64/boot/dts/qcom/x1e80100-crd.dtb: pci@1c00000: Unevaluated properties are not allowed ('vddpe-3v3-supply' was unexpected)
   	from schema $id: http://devicetree.org/schemas/pci/qcom,pcie-x1e80100.yaml#
   arch/arm64/boot/dts/qcom/x1e80100-crd.dtb: usb@a2f8800: interrupt-names: ['pwr_event', 'dp_hs_phy_irq', 'dm_hs_phy_irq'] is too short
   	from schema $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml#

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

[PATCH v2 0/8] arm64: dts: qcom: x1e80100: PCIe fixes and CRD modem support

[Johan Hovold]

This series fixes some issues with the current x1e80100 PCIe support,
adds the PCIe5 nodes and enables the modem on the CRD.

The fixes should go into 6.11, but the modem support depends on them so
I decided to send everything in one series.

As Konrad noted some of these issues have been reproduced in the other
x1e80100 dts. I'll send a separate series addressing that.

Johan


Changes in v2
 - add missing minimum OPPs
 - move 'pinctrl-name' under 'pinctrl-0'


Johan Hovold (8):
  arm64: dts: qcom: x1e80100-crd: fix PCIe4 PHY supply
  arm64: dts: qcom: x1e80100: fix PCIe domain numbers
  arm64: dts: qcom: x1e80100: add missing PCIe minimum OPP
  arm64: dts: qcom: x1e80100-crd: fix up PCIe6a pinctrl node
  arm64: dts: qcom: x1e80100-crd: disable PCIe6a perst pull down
  arm64: dts: qcom: x1e80100-crd: fix missing PCIe4 gpios
  arm64: dts: qcom: x1e80100: add PCIe5 nodes
  arm64: dts: qcom: x1e80100-crd: enable SDX65 modem

 arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 110 +++++++++++++++++--
 arch/arm64/boot/dts/qcom/x1e80100.dtsi    | 128 +++++++++++++++++++++-
 2 files changed, 227 insertions(+), 11 deletions(-)

-- 
2.44.2

[PATCH v2 8/8] arm64: dts: qcom: x1e80100-crd: enable SDX65 modem

[Johan Hovold]

Enable PCIe5 and the SDX65 modem.

Note that the modem may need to be flashed with firmware before use.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
---
 arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 65 +++++++++++++++++++++++
 1 file changed, 65 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
index caae0c3d8c7a..767118831551 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
@@ -301,6 +301,22 @@ vreg_nvme: regulator-nvme {
 		pinctrl-names = "default";
 		pinctrl-0 = <&nvme_reg_en>;
 	};
+
+	vreg_wwan: regulator-wwan {
+		compatible = "regulator-fixed";
+
+		regulator-name = "SDX_VPH_PWR";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+
+		gpio = <&tlmm 221 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+
+		pinctrl-0 = <&wwan_sw_en>;
+		pinctrl-names = "default";
+
+		regulator-boot-on;
+	};
 };
 
 &apps_rsc {
@@ -800,6 +816,25 @@ &pcie4_phy {
 	status = "okay";
 };
 
+&pcie5 {
+	perst-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
+	wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
+
+	vddpe-3v3-supply = <&vreg_wwan>;
+
+	pinctrl-0 = <&pcie5_default>;
+	pinctrl-names = "default";
+
+	status = "okay";
+};
+
+&pcie5_phy {
+	vdda-phy-supply = <&vreg_l3i_0p8>;
+	vdda-pll-supply = <&vreg_l3e_1p2>;
+
+	status = "okay";
+};
+
 &pcie6a {
 	perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
 	wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
@@ -1004,6 +1039,29 @@ wake-n-pins {
 		};
 	};
 
+	pcie5_default: pcie5-default-state {
+		clkreq-n-pins {
+			pins = "gpio150";
+			function = "pcie5_clk";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+
+		perst-n-pins {
+			pins = "gpio149";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-disable;
+		};
+
+		wake-n-pins {
+			pins = "gpio151";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+	};
+
 	pcie6a_default: pcie6a-default-state {
 		clkreq-n-pins {
 			pins = "gpio153";
@@ -1055,6 +1113,13 @@ wcd_default: wcd-reset-n-active-state {
 		bias-disable;
 		output-low;
 	};
+
+	wwan_sw_en: wwan-sw-en-state {
+		pins = "gpio221";
+		function = "gpio";
+		drive-strength = <4>;
+		bias-disable;
+	};
 };
 
 &uart21 {
-- 
2.44.2