From: Andrew Jones <andrew.jones@linux.dev>
To: kvm-riscv@lists.infradead.org
Subject: [kvm-unit-tests PATCH 0/3] riscv: 32-bit should use phys_addr_t
Date: Wed, 7 Aug 2024 17:16:30 +0200 [thread overview]
Message-ID: <20240807151629.144168-5-andrew.jones@linux.dev> (raw)
We don't really expect to test 32-bit RISC-V with physical addresses
larger than 32 bits (at least not any time too soon), but the spec
says 32-bit RISC-V can have up to 34-bit wide physical addresses and the
SBI testing wants to pretend like there's a chance the high words may be
nonzero (since SBI calls require high words as parameters). This series
ensures we use phys_addr_t where it makes sense to do so. The first couple
patches are fixes for issues found while preparing the third.
Thanks,
drew
Andrew Jones (3):
riscv: Fix virt_to_phys again
riscv: setup: Apply VA_BASE check to rv64
riscv: Support up to 34-bit physical addresses on rv32, sort of
lib/riscv/asm/io.h | 4 ++--
lib/riscv/mmu.c | 32 ++++++++++++++++++++------------
lib/riscv/setup.c | 2 +-
lib/riscv/smp.c | 7 ++++++-
4 files changed, 29 insertions(+), 16 deletions(-)
--
2.45.2
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <andrew.jones@linux.dev>
To: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org
Cc: atishp@rivosinc.com, cade.richard@berkeley.edu, jamestiotio@gmail.com
Subject: [kvm-unit-tests PATCH 0/3] riscv: 32-bit should use phys_addr_t
Date: Wed, 7 Aug 2024 17:16:30 +0200 [thread overview]
Message-ID: <20240807151629.144168-5-andrew.jones@linux.dev> (raw)
We don't really expect to test 32-bit RISC-V with physical addresses
larger than 32 bits (at least not any time too soon), but the spec
says 32-bit RISC-V can have up to 34-bit wide physical addresses and the
SBI testing wants to pretend like there's a chance the high words may be
nonzero (since SBI calls require high words as parameters). This series
ensures we use phys_addr_t where it makes sense to do so. The first couple
patches are fixes for issues found while preparing the third.
Thanks,
drew
Andrew Jones (3):
riscv: Fix virt_to_phys again
riscv: setup: Apply VA_BASE check to rv64
riscv: Support up to 34-bit physical addresses on rv32, sort of
lib/riscv/asm/io.h | 4 ++--
lib/riscv/mmu.c | 32 ++++++++++++++++++++------------
lib/riscv/setup.c | 2 +-
lib/riscv/smp.c | 7 ++++++-
4 files changed, 29 insertions(+), 16 deletions(-)
--
2.45.2
next reply other threads:[~2024-08-07 15:16 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-07 15:16 Andrew Jones [this message]
2024-08-07 15:16 ` [kvm-unit-tests PATCH 0/3] riscv: 32-bit should use phys_addr_t Andrew Jones
2024-08-07 15:16 ` [kvm-unit-tests PATCH 1/3] riscv: Fix virt_to_phys again Andrew Jones
2024-08-07 15:16 ` Andrew Jones
2024-08-07 15:16 ` [kvm-unit-tests PATCH 2/3] riscv: setup: Apply VA_BASE check to rv64 Andrew Jones
2024-08-07 15:16 ` Andrew Jones
2024-08-07 15:16 ` [kvm-unit-tests PATCH 3/3] riscv: Support up to 34-bit physical addresses on rv32, sort of Andrew Jones
2024-08-07 15:16 ` Andrew Jones
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