[PATCH v2 00/11] support I2C for AST2700

[Jamin Lin via <qemu-arm@nongnu.org>]

v1:
- support I2C for AST2700

v2:
- fix review issues and add reviewer suggestion
- update avocado test case for AST2700 I2C
- support i2c bus pool

A. pool_gap_size and reg_gap_size need to be discussion.
B. aspeed_soc_ast2700_get_irq, aspeed_soc_ast2700_get_intc_orgate
 and sc->get_irq function pointer need to be discussion.

Jamin Lin (11):
  hw/i2c/aspeed: support discontinuous register memory region of I2C bus
  hw/i2c/aspeed: introduce a new bus pool buffer attribute in
    AspeedI2Cbus
  hw/i2c/aspeed: support discontinuous poll buffer memory region of I2C
    bus
  hw/i2c/aspeed: introduce a new dma_dram_offset attribute in
    AspeedI2Cbus
  hw/i2c/aspeed: Add AST2700 support
  hw/i2c/aspeed: support Tx/Rx buffer 64 bits address
  hw/i2c/aspeed: support high part dram offset for DMA 64 bits
  aspeed/soc: introduce a new API to get the INTC orgate information
  aspeed/soc: support I2C for AST2700
  aspeed: add tmp105 in i2c bus 0 for AST2700
  machine_aspeed.py: update to test I2C for AST2700

 hw/arm/aspeed.c                 |  10 ++
 hw/arm/aspeed_ast27x0.c         |  53 ++++++
 hw/i2c/aspeed_i2c.c             | 310 ++++++++++++++++++++++++++++----
 include/hw/i2c/aspeed_i2c.h     |  28 ++-
 tests/avocado/machine_aspeed.py |  16 ++
 5 files changed, 370 insertions(+), 47 deletions(-)

-- 
2.34.1