From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Zhao Liu <zhao1.liu@intel.com>
Cc: "Markus Armbruster" <armbru@redhat.com>,
"Daniel P .\" =?ISO-8859-1?Q?Be?= =?ISO-8859-1?Q?rrang=E9?=
<berrange@redhat.com>, Eduardo Habkost <eduardo@habkost.net>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Philippe =?ISO-8859-1?Q?Mathieu-Daud=E9?= <philmd@linaro.org>,
Yanan Wang <wangyanan55@huawei.com>,
Michael S.Tsirkin <mst@redhat.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
Eric Blake <eblake@redhat.com>,
Marcelo Tosatti <mtosatti@redhat.com>,
Alex =?ISO-8859-1?Q?Benn=E9e?= <alex.bennee@linaro.org>,
Peter Maydell <peter.maydell@linaro.org>,
Sia Jee Heng <jeeheng.sia@starfivetech.com>,
qemu-devel@nongnu.org, kvm@vger.kernel.org,
qemu-riscv@nongnu.org, qemu-arm@nongnu.org,
Zhenyu Wang <zhenyu.z.wang@intel.com>,
Dapeng Mi <dapeng1.mi@linux.intel.com>,
Yongwei Ma <yongwei.ma@intel.com>"@domain.invalid
Subject: Re: [PATCH 8/8] qemu-options: Add the description of smp-cache object
Date: Wed, 14 Aug 2024 13:12:31 +0100 [thread overview]
Message-ID: <20240814131231.00007f49@Huawei.com> (raw)
In-Reply-To: <ZrnU25wxuqgST7x1@intel.com>
Just picking out one element.
>
> > If I forcibly ignore all the considerations related to concrete syntax
> > in your message, a structure seems to emerge: there's a set of caches
> > identified by name (l1i, l1d, ...), and for each cache, we have a number
> > of configurable properties (topology level, ...). Makes sense?
>
> Yes, you're right!
>
> > What else will you need to configure in the future?
>
> Maybe cache size, as Jonathan mentioned for Arm side.
Everything that ends up in ACPI PPTT either via the relationships between
the various structures, or as data in the cache entries.
(some of this also goes in system registers, but this is a superset of
what is needed to generate PPTT for a guest on a KVM system by
reading a bunch of sysfs files on the host).
The topology stuff is about relationships (pointers effectively) in that table
the other is probably all the fields in "Cache Type Structure - Type 1"
- Size
- Number of sets
- Associativity
- Line size
- Allocation type (read allocate; write allocate; read and write alloc)
- (cache type - already encoded via l1i, l1d etc)
- Write Policy - (write back, write through)
>
> > By the way, extending -machine to support JSON looks feasible to me at a
> > glance.
>
> Thanks again! Then I made it clear that it would be most appropriate to
> place the cache array in -machine, i.e., it's extensible and consistent
> with the design of the rest of the machine's properties, as well as
> consistent with my long-term needs.
>
> Later on, if -machine is able to support JSON, it will also benefit from
> it. If I have time, I will also think about how -machine can support
> JSON.
>
> Regards,
> Zhao
>
>
next prev parent reply other threads:[~2024-08-14 12:12 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-04 3:15 [PATCH 0/8] Introduce SMP Cache Topology Zhao Liu
2024-07-04 3:15 ` [PATCH 1/8] hw/core: Make CPU topology enumeration arch-agnostic Zhao Liu
2024-07-22 11:56 ` Markus Armbruster
2024-07-22 12:25 ` Jonathan Cameron
2024-07-22 13:24 ` Markus Armbruster
2024-07-22 14:01 ` Zhao Liu
2024-07-23 10:14 ` Markus Armbruster
2024-07-23 14:40 ` Zhao Liu
2024-07-04 3:15 ` [PATCH 2/8] qapi/qom: Introduce smp-cache object Zhao Liu
2024-07-09 10:13 ` Zhao Liu
2024-07-22 12:38 ` Jonathan Cameron
2024-07-22 13:33 ` Markus Armbruster
2024-07-22 14:30 ` Zhao Liu
2024-07-24 11:35 ` Markus Armbruster
2024-07-24 12:47 ` Daniel P. Berrangé
2024-07-24 14:03 ` Zhao Liu
2024-07-24 15:10 ` Zhao Liu
2024-07-24 14:55 ` Zhao Liu
2024-07-25 8:51 ` Markus Armbruster
2024-07-25 10:50 ` Jonathan Cameron
2024-07-25 10:59 ` Jonathan Cameron via
2024-07-25 10:59 ` Jonathan Cameron via
2024-07-25 10:59 ` Jonathan Cameron
2024-07-25 11:58 ` Zhao Liu
2024-07-25 11:56 ` Zhao Liu
2024-07-04 3:15 ` [PATCH 3/8] hw/core: Add smp cache topology for machine Zhao Liu
2024-07-22 12:39 ` Jonathan Cameron
2024-07-04 3:15 ` [PATCH 4/8] hw/core: Check smp cache topology support " Zhao Liu
2024-07-22 12:47 ` Jonathan Cameron
2024-07-04 3:16 ` [PATCH 5/8] i386/cpu: Support thread and module level cache topology Zhao Liu
2024-07-04 3:16 ` [PATCH 6/8] i386/cpu: Update cache topology with machine's configuration Zhao Liu
2024-07-04 3:16 ` [PATCH 7/8] i386/pc: Support cache topology in -machine for PC machine Zhao Liu
2024-07-04 3:16 ` [PATCH 8/8] qemu-options: Add the description of smp-cache object Zhao Liu
2024-07-22 13:37 ` Markus Armbruster
2024-07-22 14:42 ` Zhao Liu
2024-07-24 12:39 ` Markus Armbruster
2024-07-24 14:21 ` Zhao Liu
2024-07-25 9:07 ` Markus Armbruster
2024-08-01 9:37 ` Zhao Liu
2024-08-01 11:28 ` Markus Armbruster
2024-08-02 7:58 ` Zhao Liu
2024-08-07 10:00 ` Zhao Liu
2024-08-09 12:24 ` Markus Armbruster
2024-08-12 9:24 ` Zhao Liu
2024-08-14 12:12 ` Jonathan Cameron [this message]
2024-07-22 7:33 ` [PATCH 0/8] Introduce SMP Cache Topology Zhao Liu
2024-07-22 7:49 ` Michael S. Tsirkin
2024-07-22 12:54 ` Jonathan Cameron
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