From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: "Niklas Söderlund" <niklas.soderlund+renesas@ragnatech.se>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Geert Uytterhoeven <geert+renesas@glider.be>,
linux-media@vger.kernel.org, devicetree@vger.kernel.org,
linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH v5 3/6] arm64: dts: renesas: r8a779a0: Add family fallback for VIN IP
Date: Fri, 23 Aug 2024 16:40:02 +0300 [thread overview]
Message-ID: <20240823134002.GG26098@pendragon.ideasonboard.com> (raw)
In-Reply-To: <20240704161620.1425409-4-niklas.soderlund+renesas@ragnatech.se>
Hi Niklas,
Thank you for the patch.
On Thu, Jul 04, 2024 at 06:16:17PM +0200, Niklas Söderlund wrote:
> To make it easier to support new Gen4 SoCs a family fallback compatible
> similar to what is used for Gen2 have been added to the VIN bindings.
s/have been/has been/
> Add this fallback to the V3U DTSI.
>
> There is no functional change, but the addition of the family fallback
> in the bindings produces warnings for V3U for DTS checks if they are not
> added.
>
> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> ---
> * Changes since v4
> - New in v5.
> ---
> arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 96 +++++++++++++++--------
> 1 file changed, 64 insertions(+), 32 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> index 395f8d43ce2d..9870455714da 100644
> --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> @@ -1176,7 +1176,8 @@ msiof5: spi@e6c28000 {
> };
>
> vin00: video@e6ef0000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef0000 0 0x1000>;
> interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 730>;
> @@ -1204,7 +1205,8 @@ vin00isp0: endpoint@0 {
> };
>
> vin01: video@e6ef1000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef1000 0 0x1000>;
> interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 731>;
> @@ -1232,7 +1234,8 @@ vin01isp0: endpoint@0 {
> };
>
> vin02: video@e6ef2000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef2000 0 0x1000>;
> interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 800>;
> @@ -1260,7 +1263,8 @@ vin02isp0: endpoint@0 {
> };
>
> vin03: video@e6ef3000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef3000 0 0x1000>;
> interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 801>;
> @@ -1288,7 +1292,8 @@ vin03isp0: endpoint@0 {
> };
>
> vin04: video@e6ef4000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef4000 0 0x1000>;
> interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 802>;
> @@ -1316,7 +1321,8 @@ vin04isp0: endpoint@0 {
> };
>
> vin05: video@e6ef5000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef5000 0 0x1000>;
> interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 803>;
> @@ -1344,7 +1350,8 @@ vin05isp0: endpoint@0 {
> };
>
> vin06: video@e6ef6000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef6000 0 0x1000>;
> interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 804>;
> @@ -1372,7 +1379,8 @@ vin06isp0: endpoint@0 {
> };
>
> vin07: video@e6ef7000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef7000 0 0x1000>;
> interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 805>;
> @@ -1400,7 +1408,8 @@ vin07isp0: endpoint@0 {
> };
>
> vin08: video@e6ef8000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef8000 0 0x1000>;
> interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 806>;
> @@ -1428,7 +1437,8 @@ vin08isp1: endpoint@1 {
> };
>
> vin09: video@e6ef9000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef9000 0 0x1000>;
> interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 807>;
> @@ -1456,7 +1466,8 @@ vin09isp1: endpoint@1 {
> };
>
> vin10: video@e6efa000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6efa000 0 0x1000>;
> interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 808>;
> @@ -1484,7 +1495,8 @@ vin10isp1: endpoint@1 {
> };
>
> vin11: video@e6efb000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6efb000 0 0x1000>;
> interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 809>;
> @@ -1512,7 +1524,8 @@ vin11isp1: endpoint@1 {
> };
>
> vin12: video@e6efc000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6efc000 0 0x1000>;
> interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 810>;
> @@ -1540,7 +1553,8 @@ vin12isp1: endpoint@1 {
> };
>
> vin13: video@e6efd000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6efd000 0 0x1000>;
> interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 811>;
> @@ -1568,7 +1582,8 @@ vin13isp1: endpoint@1 {
> };
>
> vin14: video@e6efe000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6efe000 0 0x1000>;
> interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 812>;
> @@ -1596,7 +1611,8 @@ vin14isp1: endpoint@1 {
> };
>
> vin15: video@e6eff000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6eff000 0 0x1000>;
> interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 813>;
> @@ -1624,7 +1640,8 @@ vin15isp1: endpoint@1 {
> };
>
> vin16: video@e6ed0000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ed0000 0 0x1000>;
> interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 814>;
> @@ -1652,7 +1669,8 @@ vin16isp2: endpoint@2 {
> };
>
> vin17: video@e6ed1000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ed1000 0 0x1000>;
> interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 815>;
> @@ -1680,7 +1698,8 @@ vin17isp2: endpoint@2 {
> };
>
> vin18: video@e6ed2000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ed2000 0 0x1000>;
> interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 816>;
> @@ -1708,7 +1727,8 @@ vin18isp2: endpoint@2 {
> };
>
> vin19: video@e6ed3000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ed3000 0 0x1000>;
> interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 817>;
> @@ -1736,7 +1756,8 @@ vin19isp2: endpoint@2 {
> };
>
> vin20: video@e6ed4000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ed4000 0 0x1000>;
> interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 818>;
> @@ -1764,7 +1785,8 @@ vin20isp2: endpoint@2 {
> };
>
> vin21: video@e6ed5000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ed5000 0 0x1000>;
> interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 819>;
> @@ -1792,7 +1814,8 @@ vin21isp2: endpoint@2 {
> };
>
> vin22: video@e6ed6000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ed6000 0 0x1000>;
> interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 820>;
> @@ -1820,7 +1843,8 @@ vin22isp2: endpoint@2 {
> };
>
> vin23: video@e6ed7000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ed7000 0 0x1000>;
> interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
G> clocks = <&cpg CPG_MOD 821>;
> @@ -1848,7 +1872,8 @@ vin23isp2: endpoint@2 {
> };
>
> vin24: video@e6ed8000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ed8000 0 0x1000>;
> interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 822>;
> @@ -1876,7 +1901,8 @@ vin24isp3: endpoint@3 {
> };
>
> vin25: video@e6ed9000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ed9000 0 0x1000>;
> interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 823>;
> @@ -1904,7 +1930,8 @@ vin25isp3: endpoint@3 {
> };
>
> vin26: video@e6eda000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6eda000 0 0x1000>;
> interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 824>;
> @@ -1932,7 +1959,8 @@ vin26isp3: endpoint@3 {
> };
>
> vin27: video@e6edb000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6edb000 0 0x1000>;
> interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 825>;
> @@ -1960,7 +1988,8 @@ vin27isp3: endpoint@3 {
> };
>
> vin28: video@e6edc000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6edc000 0 0x1000>;
> interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 826>;
> @@ -1988,7 +2017,8 @@ vin28isp3: endpoint@3 {
> };
>
> vin29: video@e6edd000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6edd000 0 0x1000>;
> interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 827>;
> @@ -2016,7 +2046,8 @@ vin29isp3: endpoint@3 {
> };
>
> vin30: video@e6ede000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ede000 0 0x1000>;
> interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 828>;
> @@ -2044,7 +2075,8 @@ vin30isp3: endpoint@3 {
> };
>
> vin31: video@e6edf000 {
> - compatible = "renesas,vin-r8a779a0";
> + compatible = "renesas,vin-r8a779a0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6edf000 0 0x1000>;
> interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 829>;
--
Regards,
Laurent Pinchart
next prev parent reply other threads:[~2024-08-23 13:40 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-04 16:16 [PATCH v5 0/6] rcar-vin: Add support for R-Car V4M Niklas Söderlund
2024-07-04 16:16 ` [PATCH v5 1/6] dt-bindings: media: renesas,vin: Add Gen4 family fallback Niklas Söderlund
2024-08-23 13:37 ` Laurent Pinchart
2024-08-28 11:26 ` Krzysztof Kozlowski
2024-07-04 16:16 ` [PATCH v5 2/6] arm64: dts: renesas: r8a779g0: Add family fallback for VIN IP Niklas Söderlund
2024-08-23 13:39 ` Laurent Pinchart
2024-07-04 16:16 ` [PATCH v5 3/6] arm64: dts: renesas: r8a779a0: " Niklas Söderlund
2024-08-20 7:30 ` Geert Uytterhoeven
2024-08-23 13:40 ` Laurent Pinchart [this message]
2024-07-04 16:16 ` [PATCH v5 4/6] media: rcar-vin: Add family compatible for R-Car Gen4 family Niklas Söderlund
2024-08-23 13:40 ` Laurent Pinchart
2024-07-04 16:16 ` [PATCH v5 5/6] dt-bindings: media: renesas,vin: Add binding for V4M Niklas Söderlund
2024-08-23 13:41 ` Laurent Pinchart
2024-07-04 16:16 ` [PATCH v5 6/6] arm64: dts: renesas: r8a779h0: Add family fallback for VIN IP Niklas Söderlund
2024-08-23 13:42 ` Laurent Pinchart
2024-08-20 7:34 ` [PATCH v5 0/6] rcar-vin: Add support for R-Car V4M Geert Uytterhoeven
2024-08-21 11:51 ` Niklas Söderlund
2024-08-23 13:51 ` Laurent Pinchart
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