From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Li Ming <ming4.li@intel.com>
Cc: <dave@stgolabs.net>, <dave.jiang@intel.com>,
<alison.schofield@intel.com>, <vishal.l.verma@intel.com>,
<ira.weiny@intel.com>, <dan.j.williams@intel.com>,
<linux-cxl@vger.kernel.org>
Subject: Re: [PATCH 2/3] cxl/pci: cxl_dport_map_rch_aer() cleanup
Date: Tue, 27 Aug 2024 16:00:17 +0100 [thread overview]
Message-ID: <20240827160017.00007102@Huawei.com> (raw)
In-Reply-To: <20240827045755.1837473-2-ming4.li@intel.com>
On Tue, 27 Aug 2024 04:57:54 +0000
Li Ming <ming4.li@intel.com> wrote:
> cxl_dport_map_ras() is used to map CXL RAS capability, the RCH AER
> capability should not be mapped in the function but should mapped in
> cxl_dport_init_aer(). Moving cxl_dport_map_ras() out of
> cxl_dport_map_ras() and into cxl_dport_init_aer().
>
> In cxl_dport_init_aer(), the AER capability position in RCRB will be
> located but the position is only used in cxl_dport_map_rch_aer(),
> getting the position in cxl_dport_map_rch_aer() rather than
> cxl_dport_init_aer() is more reasonable and makes the code clearer.
>
> Besides, some local variables in cxl_dport_map_rch_aer() are
> unnecessary, remove them to make the function more concise.
>
> Signed-off-by: Li Ming <ming4.li@intel.com>
Seems sensible
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
next prev parent reply other threads:[~2024-08-27 15:00 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-27 4:57 [PATCH 1/3] cxl/pci: Rename cxl_setup_parent_dport() and cxl_dport_map_regs() Li Ming
2024-08-27 4:57 ` [PATCH 2/3] cxl/pci: cxl_dport_map_rch_aer() cleanup Li Ming
2024-08-27 15:00 ` Jonathan Cameron [this message]
2024-08-27 4:57 ` [PATCH 3/3] cxl/pci: Remove reduplicate host_bridge->native_aer checking Li Ming
2024-08-27 15:02 ` Jonathan Cameron
2024-08-28 8:21 ` Jonathan Cameron
2024-08-28 9:10 ` Li, Ming4
2024-08-27 14:56 ` [PATCH 1/3] cxl/pci: Rename cxl_setup_parent_dport() and cxl_dport_map_regs() Jonathan Cameron
2024-08-28 1:36 ` Li, Ming4
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