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From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Li Ming <ming4.li@intel.com>
Cc: <dave@stgolabs.net>, <dave.jiang@intel.com>,
	<alison.schofield@intel.com>, <vishal.l.verma@intel.com>,
	<ira.weiny@intel.com>, <dan.j.williams@intel.com>,
	<linux-cxl@vger.kernel.org>
Subject: Re: [PATCH 3/3] cxl/pci: Remove reduplicate host_bridge->native_aer checking
Date: Wed, 28 Aug 2024 09:21:30 +0100	[thread overview]
Message-ID: <20240828092130.000032b4@Huawei.com> (raw)
In-Reply-To: <20240827045755.1837473-3-ming4.li@intel.com>

On Tue, 27 Aug 2024 04:57:55 +0000
Li Ming <ming4.li@intel.com> wrote:

For title, just duplicate (not reduplicate)


> cxl_dport_init_aer() already checks host_bridge->native_aer before
> invoking cxl_disable_rch_root_ints(), so cxl_disable_rch_root_ints()
> does not need to check it again.
> 
> Signed-off-by: Li Ming <ming4.li@intel.com>
> ---
>  drivers/cxl/core/pci.c | 17 ++++++-----------
>  1 file changed, 6 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
> index 118db6a577d7..7234166df0df 100644
> --- a/drivers/cxl/core/pci.c
> +++ b/drivers/cxl/core/pci.c
> @@ -800,14 +800,11 @@ static void cxl_dport_map_ras(struct cxl_dport *dport)
>  static void cxl_disable_rch_root_ints(struct cxl_dport *dport)
>  {
>  	void __iomem *aer_base = dport->regs.dport_aer;
> -	struct pci_host_bridge *bridge;
>  	u32 aer_cmd_mask, aer_cmd;
>  
>  	if (!aer_base)
>  		return;
>  
> -	bridge = to_pci_host_bridge(dport->dport_dev);
> -
>  	/*
>  	 * Disable RCH root port command interrupts.
>  	 * CXL 3.0 12.2.1.1 - RCH Downstream Port-detected Errors
> @@ -816,14 +813,12 @@ static void cxl_disable_rch_root_ints(struct cxl_dport *dport)
>  	 * the root cmd register's interrupts is required. But, PCI spec
>  	 * shows these are disabled by default on reset.
>  	 */
> -	if (bridge->native_aer) {
> -		aer_cmd_mask = (PCI_ERR_ROOT_CMD_COR_EN |
> -				PCI_ERR_ROOT_CMD_NONFATAL_EN |
> -				PCI_ERR_ROOT_CMD_FATAL_EN);
> -		aer_cmd = readl(aer_base + PCI_ERR_ROOT_COMMAND);
> -		aer_cmd &= ~aer_cmd_mask;
> -		writel(aer_cmd, aer_base + PCI_ERR_ROOT_COMMAND);
> -	}
> +	aer_cmd_mask = (PCI_ERR_ROOT_CMD_COR_EN |
> +			PCI_ERR_ROOT_CMD_NONFATAL_EN |
> +			PCI_ERR_ROOT_CMD_FATAL_EN);
> +	aer_cmd = readl(aer_base + PCI_ERR_ROOT_COMMAND);
> +	aer_cmd &= ~aer_cmd_mask;
> +	writel(aer_cmd, aer_base + PCI_ERR_ROOT_COMMAND);
>  }
>  
>  /**


  parent reply	other threads:[~2024-08-28  8:21 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-27  4:57 [PATCH 1/3] cxl/pci: Rename cxl_setup_parent_dport() and cxl_dport_map_regs() Li Ming
2024-08-27  4:57 ` [PATCH 2/3] cxl/pci: cxl_dport_map_rch_aer() cleanup Li Ming
2024-08-27 15:00   ` Jonathan Cameron
2024-08-27  4:57 ` [PATCH 3/3] cxl/pci: Remove reduplicate host_bridge->native_aer checking Li Ming
2024-08-27 15:02   ` Jonathan Cameron
2024-08-28  8:21   ` Jonathan Cameron [this message]
2024-08-28  9:10     ` Li, Ming4
2024-08-27 14:56 ` [PATCH 1/3] cxl/pci: Rename cxl_setup_parent_dport() and cxl_dport_map_regs() Jonathan Cameron
2024-08-28  1:36   ` Li, Ming4

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