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From: Jamin Lin via <qemu-arm@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Steven Lee" <steven_lee@aspeedtech.com>,
	"Troy Lee" <leetroy@gmail.com>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Joel Stanley" <joel@jms.id.au>, "Cleber Rosa" <crosa@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Wainer dos Santos Moschetta" <wainersm@redhat.com>,
	"Beraldo Leal" <bleal@redhat.com>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: jamin_lin@aspeedtech.com, troy_lee@aspeedtech.com,
	yunlin.tang@aspeedtech.com, "Cédric Le Goater" <clg@redhat.com>
Subject: [PATCH v3 01/11] hw/i2c/aspeed: Support discontinuous register memory region of I2C bus
Date: Tue, 3 Sep 2024 16:35:18 +0800	[thread overview]
Message-ID: <20240903083528.2182190-2-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20240903083528.2182190-1-jamin_lin@aspeedtech.com>

It only support continuous register memory region for all I2C bus.
However, the register address of all I2c bus are discontinuous
for AST2700.

Ex: the register address of I2C bus for ast2700 as following.
0x100 - 0x17F: Device 0
0x200 - 0x27F: Device 1
0x300 - 0x37F: Device 2
0x400 - 0x47F: Device 3
0x500 - 0x57F: Device 4
0x600 - 0x67F: Device 5
0x700 - 0x77F: Device 6
0x800 - 0x87F: Device 7
0x900 - 0x97F: Device 8
0xA00 - 0xA7F: Device 9
0xB00 - 0xB7F: Device 10
0xC00 - 0xC7F: Device 11
0xD00 - 0xD7F: Device 12
0xE00 - 0xE7F: Device 13
0xF00 – 0xF7F: Device 14
0x1000 – 0x107F: Device 15

Introduce a new class attribute to make user set each I2C bus gap size.
Update formula to create all I2C bus register memory regions.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
 hw/i2c/aspeed_i2c.c         | 3 ++-
 include/hw/i2c/aspeed_i2c.h | 1 +
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c
index b52a99896c..9c222a02fe 100644
--- a/hw/i2c/aspeed_i2c.c
+++ b/hw/i2c/aspeed_i2c.c
@@ -1012,6 +1012,7 @@ static void aspeed_i2c_realize(DeviceState *dev, Error **errp)
     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
     AspeedI2CState *s = ASPEED_I2C(dev);
     AspeedI2CClass *aic = ASPEED_I2C_GET_CLASS(s);
+    uint32_t reg_offset = aic->reg_size + aic->reg_gap_size;
 
     sysbus_init_irq(sbd, &s->irq);
     memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_i2c_ctrl_ops, s,
@@ -1034,7 +1035,7 @@ static void aspeed_i2c_realize(DeviceState *dev, Error **errp)
             return;
         }
 
-        memory_region_add_subregion(&s->iomem, aic->reg_size * (i + offset),
+        memory_region_add_subregion(&s->iomem, reg_offset * (i + offset),
                                     &s->busses[i].mr);
     }
 
diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h
index fad5e9259a..02ede85906 100644
--- a/include/hw/i2c/aspeed_i2c.h
+++ b/include/hw/i2c/aspeed_i2c.h
@@ -275,6 +275,7 @@ struct AspeedI2CClass {
 
     uint8_t num_busses;
     uint8_t reg_size;
+    uint32_t reg_gap_size;
     uint8_t gap;
     qemu_irq (*bus_get_irq)(AspeedI2CBus *);
 
-- 
2.34.1


WARNING: multiple messages have this Message-ID (diff)
From: Jamin Lin via <qemu-devel@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Steven Lee" <steven_lee@aspeedtech.com>,
	"Troy Lee" <leetroy@gmail.com>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Joel Stanley" <joel@jms.id.au>, "Cleber Rosa" <crosa@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Wainer dos Santos Moschetta" <wainersm@redhat.com>,
	"Beraldo Leal" <bleal@redhat.com>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: jamin_lin@aspeedtech.com, troy_lee@aspeedtech.com,
	yunlin.tang@aspeedtech.com, "Cédric Le Goater" <clg@redhat.com>
Subject: [PATCH v3 01/11] hw/i2c/aspeed: Support discontinuous register memory region of I2C bus
Date: Tue, 3 Sep 2024 16:35:18 +0800	[thread overview]
Message-ID: <20240903083528.2182190-2-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20240903083528.2182190-1-jamin_lin@aspeedtech.com>

It only support continuous register memory region for all I2C bus.
However, the register address of all I2c bus are discontinuous
for AST2700.

Ex: the register address of I2C bus for ast2700 as following.
0x100 - 0x17F: Device 0
0x200 - 0x27F: Device 1
0x300 - 0x37F: Device 2
0x400 - 0x47F: Device 3
0x500 - 0x57F: Device 4
0x600 - 0x67F: Device 5
0x700 - 0x77F: Device 6
0x800 - 0x87F: Device 7
0x900 - 0x97F: Device 8
0xA00 - 0xA7F: Device 9
0xB00 - 0xB7F: Device 10
0xC00 - 0xC7F: Device 11
0xD00 - 0xD7F: Device 12
0xE00 - 0xE7F: Device 13
0xF00 – 0xF7F: Device 14
0x1000 – 0x107F: Device 15

Introduce a new class attribute to make user set each I2C bus gap size.
Update formula to create all I2C bus register memory regions.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
 hw/i2c/aspeed_i2c.c         | 3 ++-
 include/hw/i2c/aspeed_i2c.h | 1 +
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c
index b52a99896c..9c222a02fe 100644
--- a/hw/i2c/aspeed_i2c.c
+++ b/hw/i2c/aspeed_i2c.c
@@ -1012,6 +1012,7 @@ static void aspeed_i2c_realize(DeviceState *dev, Error **errp)
     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
     AspeedI2CState *s = ASPEED_I2C(dev);
     AspeedI2CClass *aic = ASPEED_I2C_GET_CLASS(s);
+    uint32_t reg_offset = aic->reg_size + aic->reg_gap_size;
 
     sysbus_init_irq(sbd, &s->irq);
     memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_i2c_ctrl_ops, s,
@@ -1034,7 +1035,7 @@ static void aspeed_i2c_realize(DeviceState *dev, Error **errp)
             return;
         }
 
-        memory_region_add_subregion(&s->iomem, aic->reg_size * (i + offset),
+        memory_region_add_subregion(&s->iomem, reg_offset * (i + offset),
                                     &s->busses[i].mr);
     }
 
diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h
index fad5e9259a..02ede85906 100644
--- a/include/hw/i2c/aspeed_i2c.h
+++ b/include/hw/i2c/aspeed_i2c.h
@@ -275,6 +275,7 @@ struct AspeedI2CClass {
 
     uint8_t num_busses;
     uint8_t reg_size;
+    uint32_t reg_gap_size;
     uint8_t gap;
     qemu_irq (*bus_get_irq)(AspeedI2CBus *);
 
-- 
2.34.1



  reply	other threads:[~2024-09-03  8:36 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-03  8:35 [PATCH v3 00/11] support I2C for AST2700 Jamin Lin via
2024-09-03  8:35 ` Jamin Lin via [this message]
2024-09-03  8:35   ` [PATCH v3 01/11] hw/i2c/aspeed: Support discontinuous register memory region of I2C bus Jamin Lin via
2024-09-03  8:35 ` [PATCH v3 02/11] hw/i2c/aspeed: Introduce a new bus pool buffer attribute in AspeedI2Cbus Jamin Lin via
2024-09-03  8:35 ` [PATCH v3 03/11] hw/i2c/aspeed: Support discontinuous poll buffer memory region of I2C bus Jamin Lin via
2024-09-03  8:35   ` Jamin Lin via
2024-09-03  8:35 ` [PATCH v3 04/11] hw/i2c/aspeed: Introduce a new dma_dram_offset attribute in AspeedI2Cbus Jamin Lin via
2024-09-03  8:35 ` [PATCH v3 05/11] hw/i2c/aspeed: Add AST2700 support Jamin Lin via
2024-09-03  8:35   ` Jamin Lin via
2024-09-03  8:35 ` [PATCH v3 06/11] hw/i2c/aspeed: Add support for Tx/Rx buffer 64 bit addresses Jamin Lin via
2024-09-03  8:35   ` Jamin Lin via
2024-09-03  8:35 ` [PATCH v3 07/11] hw/i2c/aspeed: Add support for " Jamin Lin via
2024-09-03  8:35   ` Jamin Lin via
2024-09-03  8:35 ` [PATCH v3 08/11] aspeed/soc: Introduce a new API to get the device irq Jamin Lin via
2024-09-03  8:54   ` [SPAM] " Cédric Le Goater
2024-09-03  8:35 ` [PATCH v3 09/11] aspeed/soc: Support I2C for AST2700 Jamin Lin via
2024-09-03  8:35   ` Jamin Lin via
2024-09-03  8:54   ` [SPAM] " Cédric Le Goater
2024-09-03  8:35 ` [PATCH v3 10/11] aspeed: Add tmp105 in i2c bus 0 " Jamin Lin via
2024-09-03  8:35 ` [PATCH v3 11/11] machine_aspeed.py: Update to test I2C " Jamin Lin via
2024-09-03 14:11 ` [SPAM] [PATCH v3 00/11] support " Cédric Le Goater
2024-09-04  0:57   ` Jamin Lin
2024-09-04  7:28     ` Cédric Le Goater
2024-09-04  7:35       ` Jamin Lin
2024-09-23  9:59         ` Jamin Lin
2024-09-04  9:01       ` Troy Lee
2024-09-06  7:49         ` Cédric Le Goater

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