From: Alireza Sanaee via <qemu-arm@nongnu.org>
To: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
Cc: <qemu-devel@nongnu.org>, <qemu-arm@nongnu.org>,
<zhao1.liu@intel.com>, <zhenyu.z.wang@intel.com>,
<dapeng1.mi@linux.intel.com>, <yongwei.ma@intel.com>,
<armbru@redhat.com>, <farman@linux.ibm.com>,
<peter.maydell@linaro.org>, <mst@redhat.com>,
<anisinha@redhat.com>, <shannon.zhaosl@gmail.com>,
<imammedo@redhat.com>, <mtosatti@redhat.com>,
<berrange@redhat.com>, <richard.henderson@linaro.org>,
<linuxarm@huwei.com>, <shameerali.kolothum.thodi@huawei.com>,
<jiangkunkun@huawei.com>
Subject: Re: [PATCH 2/5] i386/cpu: add IsDefined flag to smp-cache property
Date: Fri, 13 Sep 2024 14:26:58 +0100 [thread overview]
Message-ID: <20240913142658.00002da4@huawei.com> (raw)
In-Reply-To: <20240913112128.0000074c@Huawei.com>
On Fri, 13 Sep 2024 11:21:28 +0100
Jonathan Cameron <Jonathan.Cameron@Huawei.com> wrote:
> On Thu, 12 Sep 2024 14:38:26 +0100
> Alireza Sanaee <alireza.sanaee@huawei.com> wrote:
>
> > This commit adds IsDefined flag to the object and this helps in
> > avoiding extra checks for every single layer of caches in both x86
> > and ARM.
> Hi Ali,
>
> You mention x86 here, but no code changes to support that?
>
> Jonathan
>
Hi Jonathan,
I used this flag in Patch 4 in build_pptt function.
This flag is one of the todos Liu put as comment on his patch as
well, and it is useful for me too.
Thanks,
Alireza
> >
> > Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
> > ---
> > hw/core/machine-smp.c | 2 ++
> > include/hw/boards.h | 1 +
> > 2 files changed, 3 insertions(+)
> >
> > diff --git a/hw/core/machine-smp.c b/hw/core/machine-smp.c
> > index 9a28194676..5a02bbf584 100644
> > --- a/hw/core/machine-smp.c
> > +++ b/hw/core/machine-smp.c
> > @@ -371,6 +371,8 @@ bool machine_parse_smp_cache(MachineState *ms,
> > return false;
> > }
> >
> > + ms->smp_cache.IsDefined = true;
> > +
> > return true;
> > }
> >
> > diff --git a/include/hw/boards.h b/include/hw/boards.h
> > index db2aa2b706..2883a57084 100644
> > --- a/include/hw/boards.h
> > +++ b/include/hw/boards.h
> > @@ -373,6 +373,7 @@ typedef struct CpuTopology {
> >
> > typedef struct SmpCache {
> > SmpCacheProperties props[CACHE_LEVEL_AND_TYPE__MAX];
> > + bool IsDefined;
> > } SmpCache;
> >
> > /**
>
WARNING: multiple messages have this Message-ID (diff)
From: Alireza Sanaee via <qemu-devel@nongnu.org>
To: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
Cc: <qemu-devel@nongnu.org>, <qemu-arm@nongnu.org>,
<zhao1.liu@intel.com>, <zhenyu.z.wang@intel.com>,
<dapeng1.mi@linux.intel.com>, <yongwei.ma@intel.com>,
<armbru@redhat.com>, <farman@linux.ibm.com>,
<peter.maydell@linaro.org>, <mst@redhat.com>,
<anisinha@redhat.com>, <shannon.zhaosl@gmail.com>,
<imammedo@redhat.com>, <mtosatti@redhat.com>,
<berrange@redhat.com>, <richard.henderson@linaro.org>,
<linuxarm@huwei.com>, <shameerali.kolothum.thodi@huawei.com>,
<jiangkunkun@huawei.com>
Subject: Re: [PATCH 2/5] i386/cpu: add IsDefined flag to smp-cache property
Date: Fri, 13 Sep 2024 14:26:58 +0100 [thread overview]
Message-ID: <20240913142658.00002da4@huawei.com> (raw)
In-Reply-To: <20240913112128.0000074c@Huawei.com>
On Fri, 13 Sep 2024 11:21:28 +0100
Jonathan Cameron <Jonathan.Cameron@Huawei.com> wrote:
> On Thu, 12 Sep 2024 14:38:26 +0100
> Alireza Sanaee <alireza.sanaee@huawei.com> wrote:
>
> > This commit adds IsDefined flag to the object and this helps in
> > avoiding extra checks for every single layer of caches in both x86
> > and ARM.
> Hi Ali,
>
> You mention x86 here, but no code changes to support that?
>
> Jonathan
>
Hi Jonathan,
I used this flag in Patch 4 in build_pptt function.
This flag is one of the todos Liu put as comment on his patch as
well, and it is useful for me too.
Thanks,
Alireza
> >
> > Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
> > ---
> > hw/core/machine-smp.c | 2 ++
> > include/hw/boards.h | 1 +
> > 2 files changed, 3 insertions(+)
> >
> > diff --git a/hw/core/machine-smp.c b/hw/core/machine-smp.c
> > index 9a28194676..5a02bbf584 100644
> > --- a/hw/core/machine-smp.c
> > +++ b/hw/core/machine-smp.c
> > @@ -371,6 +371,8 @@ bool machine_parse_smp_cache(MachineState *ms,
> > return false;
> > }
> >
> > + ms->smp_cache.IsDefined = true;
> > +
> > return true;
> > }
> >
> > diff --git a/include/hw/boards.h b/include/hw/boards.h
> > index db2aa2b706..2883a57084 100644
> > --- a/include/hw/boards.h
> > +++ b/include/hw/boards.h
> > @@ -373,6 +373,7 @@ typedef struct CpuTopology {
> >
> > typedef struct SmpCache {
> > SmpCacheProperties props[CACHE_LEVEL_AND_TYPE__MAX];
> > + bool IsDefined;
> > } SmpCache;
> >
> > /**
>
next prev parent reply other threads:[~2024-09-13 13:27 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-12 13:38 [RFC PATCH 0/5] Specifying cache topology on ARM Alireza Sanaee via
2024-09-12 13:38 ` [PATCH 1/5] bios-tables-test: prepare to change ARM ACPI virt PPTT Alireza Sanaee via
2024-09-12 13:38 ` Alireza Sanaee via
2024-09-12 13:38 ` [PATCH 2/5] i386/cpu: add IsDefined flag to smp-cache property Alireza Sanaee via
2024-09-12 13:38 ` Alireza Sanaee via
2024-09-13 10:21 ` Jonathan Cameron via
2024-09-13 10:21 ` Jonathan Cameron via
2024-09-13 13:26 ` Alireza Sanaee via [this message]
2024-09-13 13:26 ` Alireza Sanaee via
2024-10-07 12:01 ` Zhao Liu
2024-09-12 13:38 ` [PATCH 3/5] target/arm/tcg: increase cache level for cpu=max Alireza Sanaee via
2024-09-12 13:38 ` Alireza Sanaee via
2024-09-12 13:38 ` [PATCH 4/5] hw/acpi: add cache hierarchy node to pptt table Alireza Sanaee via
2024-09-12 13:38 ` [PATCH 5/5] tests/acpi/arm/virt/PPTT: update golden masters for PPTT update Alireza Sanaee via
2024-09-12 13:38 ` Alireza Sanaee via
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