From: Jason Gunthorpe <jgg@ziepe.ca>
To: Yang Shi <yang@os.amperecomputing.com>
Cc: Nicolin Chen <nicolinc@nvidia.com>,
will@kernel.org, robin.murphy@arm.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] iommu/arm-smmu-v3: Fix L1 stream table index calculation for AmpereOne
Date: Tue, 1 Oct 2024 16:18:00 -0300 [thread overview]
Message-ID: <20241001191800.GA1369530@ziepe.ca> (raw)
In-Reply-To: <45b97496-29a2-4111-ba38-3c8bcf9f8b4d@os.amperecomputing.com>
On Tue, Oct 01, 2024 at 12:09:03PM -0700, Yang Shi wrote:
> > Also, there are other places doing "1 << smmu->sid_bits", e.g.
> > arm_smmu_init_strtab_linear().
>
> The disassembly shows it uses "sbfiz x21, x20, 6, 32" instead of lsl. 1UL
> should be used if we want to take extra caution and don't prefer rely on
> compiler.
Still, we should be fixing them all if sid_bits == 32, all those
shifts should be throwing a UBSAN error. It would be crazy to have a
32 bit linear table but I guess it is allowed?
Jason
next prev parent reply other threads:[~2024-10-01 19:19 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-01 18:03 [PATCH] iommu/arm-smmu-v3: Fix L1 stream table index calculation for AmpereOne Yang Shi
2024-10-01 18:27 ` Nicolin Chen
2024-10-01 19:09 ` Yang Shi
2024-10-01 19:18 ` Jason Gunthorpe [this message]
2024-10-01 19:38 ` Yang Shi
2024-10-01 19:46 ` Jason Gunthorpe
2024-10-01 20:31 ` Yang Shi
2024-10-01 20:47 ` Yang Shi
2024-10-01 21:02 ` Jason Gunthorpe
2024-10-01 21:32 ` Yang Shi
2024-10-02 16:58 ` James Morse
2024-10-01 19:29 ` Nicolin Chen
2024-10-01 19:48 ` Yang Shi
2024-10-02 9:59 ` Robin Murphy
2024-10-02 15:38 ` Yang Shi
2024-10-02 16:58 ` James Morse
2024-10-02 17:39 ` Yang Shi
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