[Buildroot] [PATCH 1/2] configs/icnova-a20-adb4006: Bump Linux and U-Boot version

[Buildroot] [PATCH 1/2] configs/icnova-a20-adb4006: Bump Linux and U-Boot version

[Ludwig Kormann]

Bump version of Linux to 6.6.54 and U-Boot to 2024.10

Signed-off-by: Ludwig Kormann <ludwig.kormann@ict42.de>
---
 configs/icnova-a20-adb4006_defconfig | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/configs/icnova-a20-adb4006_defconfig b/configs/icnova-a20-adb4006_defconfig
index ba529c8db5..948b054d83 100644
--- a/configs/icnova-a20-adb4006_defconfig
+++ b/configs/icnova-a20-adb4006_defconfig
@@ -20,7 +20,7 @@ BR2_PACKAGE_HOST_MTOOLS=y
 # Kernel
 BR2_LINUX_KERNEL=y
 BR2_LINUX_KERNEL_CUSTOM_VERSION=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.6.14"
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.6.54"
 BR2_LINUX_KERNEL_DEFCONFIG="sunxi"
 BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="board/in-circuit/icnova-a20-adb4006/linux.fragment"
 BR2_LINUX_KERNEL_DTS_SUPPORT=y
@@ -36,11 +36,12 @@ BR2_TARGET_ROOTFS_EXT2_SIZE="128M"
 BR2_TARGET_UBOOT=y
 BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
 BR2_TARGET_UBOOT_CUSTOM_VERSION=y
-BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2024.01"
+BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2024.10"
 BR2_TARGET_UBOOT_BOARD_DEFCONFIG="icnova-a20-adb4006"
 BR2_TARGET_UBOOT_NEEDS_DTC=y
 BR2_TARGET_UBOOT_NEEDS_PYLIBFDT=y
 BR2_TARGET_UBOOT_NEEDS_OPENSSL=y
+BR2_TARGET_UBOOT_NEEDS_GNUTLS=y
 BR2_TARGET_UBOOT_SPL=y
 BR2_TARGET_UBOOT_SPL_NAME="u-boot-sunxi-with-spl.bin"
 BR2_PACKAGE_HOST_UBOOT_TOOLS=y
-- 
2.39.2

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[Buildroot] [PATCH 2/2] configs/icnova-a20-adb4006: add uboot patch for reliable bootclk

[Ludwig Kormann]

Up until now cpu clock gets initialized at 384 MHz, which is
the highest supported cpu clock.

Recent A20 batches show an increased percentage of modules
reacting very sensitive to operating conditions outside the
specifications.

The cpu dies very shortly after PLLs, core frequency or cpu
voltage are missconfigured. E.g.:
- uboot SPL selects 384 MHz as cpu clock which requires a cpu
  voltage of at least 1.1 V.
- Linux CPU Frequency scaling with most sun7i dts will reduce
  cpu voltage down to 1.0 V.
- When intiating a reboot or reset from linux the cpu voltage
  may keep the 1.0 V configuration and the cpu dies during SPL
  initialization.

Therefore reduce cpu clock at uboot SPL initialization down
to 144 MHz from 384 MHz.

Use patch until KConfig option in uboot becomes available.

Signed-off-by: Ludwig Kormann <ludwig.kormann@ict42.de>
---
 .../uboot-sun7i-a20-reliable-bootclk.patch            | 11 +++++++++++
 configs/icnova-a20-adb4006_defconfig                  |  1 +
 2 files changed, 12 insertions(+)
 create mode 100644 board/in-circuit/icnova-a20-adb4006/uboot-patches/uboot-sun7i-a20-reliable-bootclk.patch

diff --git a/board/in-circuit/icnova-a20-adb4006/uboot-patches/uboot-sun7i-a20-reliable-bootclk.patch b/board/in-circuit/icnova-a20-adb4006/uboot-patches/uboot-sun7i-a20-reliable-bootclk.patch
new file mode 100644
index 0000000000..ce83f59e4b
--- /dev/null
+++ b/board/in-circuit/icnova-a20-adb4006/uboot-patches/uboot-sun7i-a20-reliable-bootclk.patch
@@ -0,0 +1,11 @@
+--- uboot/arch/arm/include/asm/arch-sunxi/clock_sun4i.h	2024-10-10 09:34:01.346401734 +0200
++++ uboot/arch/arm/include/asm/arch-sunxi/clock_sun4i.h.modified	2024-10-10 09:33:55.146402528 +0200
+@@ -141,7 +141,7 @@
+ #define CCM_PLL1_CFG_SIG_DELT_PAT_EN_SHIFT	2
+ #define CCM_PLL1_CFG_FACTOR_M_SHIFT		0
+ 
+-#define PLL1_CFG_DEFAULT	0xa1005000
++#define PLL1_CFG_DEFAULT	0xa1004c01
+ 
+ #if defined CONFIG_OLD_SUNXI_KERNEL_COMPAT && defined CONFIG_MACH_SUN5I
+ /*
diff --git a/configs/icnova-a20-adb4006_defconfig b/configs/icnova-a20-adb4006_defconfig
index 948b054d83..4cf7826346 100644
--- a/configs/icnova-a20-adb4006_defconfig
+++ b/configs/icnova-a20-adb4006_defconfig
@@ -38,6 +38,7 @@ BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
 BR2_TARGET_UBOOT_CUSTOM_VERSION=y
 BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2024.10"
 BR2_TARGET_UBOOT_BOARD_DEFCONFIG="icnova-a20-adb4006"
+BR2_TARGET_UBOOT_PATCH="board/in-circuit/icnova-a20-adb4006/uboot-patches"
 BR2_TARGET_UBOOT_NEEDS_DTC=y
 BR2_TARGET_UBOOT_NEEDS_PYLIBFDT=y
 BR2_TARGET_UBOOT_NEEDS_OPENSSL=y
-- 
2.39.2

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Re: [Buildroot] [PATCH 2/2] configs/icnova-a20-adb4006: add uboot patch for reliable bootclk

[Thomas Petazzoni via buildroot]

Hello Ludwig,

On Thu, 10 Oct 2024 11:15:31 +0200
Ludwig Kormann <ludwig.kormann@ict42.de> wrote:

> Up until now cpu clock gets initialized at 384 MHz, which is
> the highest supported cpu clock.
> 
> Recent A20 batches show an increased percentage of modules
> reacting very sensitive to operating conditions outside the
> specifications.
> 
> The cpu dies very shortly after PLLs, core frequency or cpu
> voltage are missconfigured. E.g.:
> - uboot SPL selects 384 MHz as cpu clock which requires a cpu
>   voltage of at least 1.1 V.
> - Linux CPU Frequency scaling with most sun7i dts will reduce
>   cpu voltage down to 1.0 V.
> - When intiating a reboot or reset from linux the cpu voltage
>   may keep the 1.0 V configuration and the cpu dies during SPL
>   initialization.
> 
> Therefore reduce cpu clock at uboot SPL initialization down
> to 144 MHz from 384 MHz.
> 
> Use patch until KConfig option in uboot becomes available.
> 
> Signed-off-by: Ludwig Kormann <ludwig.kormann@ict42.de>

Thanks as well for your patch! Some comments below.

> ---
>  .../uboot-sun7i-a20-reliable-bootclk.patch            | 11 +++++++++++
>  configs/icnova-a20-adb4006_defconfig                  |  1 +
>  2 files changed, 12 insertions(+)
>  create mode 100644 board/in-circuit/icnova-a20-adb4006/uboot-patches/uboot-sun7i-a20-reliable-bootclk.patch
> 
> diff --git a/board/in-circuit/icnova-a20-adb4006/uboot-patches/uboot-sun7i-a20-reliable-bootclk.patch b/board/in-circuit/icnova-a20-adb4006/uboot-patches/uboot-sun7i-a20-reliable-bootclk.patch
> new file mode 100644
> index 0000000000..ce83f59e4b
> --- /dev/null
> +++ b/board/in-circuit/icnova-a20-adb4006/uboot-patches/uboot-sun7i-a20-reliable-bootclk.patch
> @@ -0,0 +1,11 @@
> +--- uboot/arch/arm/include/asm/arch-sunxi/clock_sun4i.h	2024-10-10 09:34:01.346401734 +0200
> ++++ uboot/arch/arm/include/asm/arch-sunxi/clock_sun4i.h.modified	2024-10-10 09:33:55.146402528 +0200

We require all patches to have a description, a Signed-off-by: line and
an Upstream: tag. Also, since U-Boot is using Git upstream, we strongly
prefer a patch generated by "git format-patch".

> diff --git a/configs/icnova-a20-adb4006_defconfig b/configs/icnova-a20-adb4006_defconfig
> index 948b054d83..4cf7826346 100644
> --- a/configs/icnova-a20-adb4006_defconfig
> +++ b/configs/icnova-a20-adb4006_defconfig
> @@ -38,6 +38,7 @@ BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
>  BR2_TARGET_UBOOT_CUSTOM_VERSION=y
>  BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2024.10"
>  BR2_TARGET_UBOOT_BOARD_DEFCONFIG="icnova-a20-adb4006"
> +BR2_TARGET_UBOOT_PATCH="board/in-circuit/icnova-a20-adb4006/uboot-patches"

Instead of this, could you use BR2_GLOBAL_PATCH_DIRECTORIES? It allows
to patch all packages, not just u-boot, and is anyway going to be
needed to provide the hashes, as I suggested in my review of your PATCH
1/2.

Thanks a lot!

Thomas
-- 
Thomas Petazzoni, co-owner and CEO, Bootlin
Embedded Linux and Kernel engineering and training
https://bootlin.com
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Re: [Buildroot] [PATCH 1/2] configs/icnova-a20-adb4006: Bump Linux and U-Boot version

[Thomas Petazzoni via buildroot]

Hello Ludwig,

On Thu, 10 Oct 2024 11:15:30 +0200
Ludwig Kormann <ludwig.kormann@ict42.de> wrote:

> Bump version of Linux to 6.6.54 and U-Boot to 2024.10
> 
> Signed-off-by: Ludwig Kormann <ludwig.kormann@ict42.de>
> ---
>  configs/icnova-a20-adb4006_defconfig | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)

Thanks a lot for your patch, which looks good. However, we're trying to
migrate all defconfigs to use hashes to check the Linux kernel and
U-Boot source code, by enabling BR2_DOWNLOAD_FORCE_CHECK_HASHES=y.
Could you also do this for this defconfig?

There is a tool ./utils/add-custom-hashes that helps in generating
those hashes. You can have a look at other defconfigs that use
BR2_DOWNLOAD_FORCE_CHECK_HASHES=y to see how things are done.

Thanks a lot!

Thomas
-- 
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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