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From: Jason Gunthorpe <jgg@nvidia.com>
To: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc: linux-kernel@vger.kernel.org, iommu@lists.linux.dev,
	joro@8bytes.org, robin.murphy@arm.com, vasant.hegde@amd.com,
	kevin.tian@intel.com, jon.grimm@amd.com, santosh.shukla@amd.com,
	pandoh@google.com, kumaranand@google.com,
	Uros Bizjak <ubizjak@gmail.com>
Subject: Re: [PATCH v6 2/9] asm/rwonce: Introduce [READ|WRITE]_ONCE() support for __int128
Date: Wed, 16 Oct 2024 10:08:19 -0300	[thread overview]
Message-ID: <20241016130819.GJ3559746@nvidia.com> (raw)
In-Reply-To: <20241016051756.4317-3-suravee.suthikulpanit@amd.com>

On Wed, Oct 16, 2024 at 05:17:49AM +0000, Suravee Suthikulpanit wrote:
> From: Uros Bizjak <ubizjak@gmail.com>
> 
> Currently, [READ|WRITE]_ONCE() do not support variable of type __int128.
> Re-define "__dword_type" from type "long long" to __int128 if supported.
> 
> Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> ---
>  include/asm-generic/rwonce.h   | 2 +-
>  include/linux/compiler_types.h | 8 +++++++-
>  2 files changed, 8 insertions(+), 2 deletions(-)

I guess it makes sense that the "strong prevailing wind" would apply
to 2x u64 reads as well as 2x u32 reads. Though use with caution..

Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>

Jason

  reply	other threads:[~2024-10-16 13:08 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-16  5:17 [PATCH v6 0/9] iommu/amd: Use 128-bit cmpxchg operation to update DTE Suravee Suthikulpanit
2024-10-16  5:17 ` [PATCH v6 1/9] iommu/amd: Disable AMD IOMMU if CMPXCHG16B feature is not supported Suravee Suthikulpanit
2024-10-16  5:17 ` [PATCH v6 2/9] asm/rwonce: Introduce [READ|WRITE]_ONCE() support for __int128 Suravee Suthikulpanit
2024-10-16 13:08   ` Jason Gunthorpe [this message]
2024-10-16  5:17 ` [PATCH v6 3/9] iommu/amd: Introduce helper function to update 256-bit DTE Suravee Suthikulpanit
2024-10-16  5:17 ` [PATCH v6 4/9] iommu/amd: Introduce per-device DTE cache to store persistent bits Suravee Suthikulpanit
2024-10-16 13:21   ` Jason Gunthorpe
2024-10-16  5:17 ` [PATCH v6 5/9] iommu/amd: Modify set_dte_entry() to use 256-bit DTE helpers Suravee Suthikulpanit
2024-10-16 13:52   ` Jason Gunthorpe
2024-10-16 14:07   ` Jason Gunthorpe
2024-10-16 14:12   ` Jason Gunthorpe
2024-10-16  5:17 ` [PATCH v6 6/9] iommu/amd: Introduce helper function get_dte256() Suravee Suthikulpanit
2024-10-16  5:17 ` [PATCH v6 7/9] iommu/amd: Move erratum 63 logic to write_dte_lower128() Suravee Suthikulpanit
2024-10-16 13:30   ` Jason Gunthorpe
2024-10-31  8:53     ` Suthikulpanit, Suravee
2024-10-31  8:53     ` Suthikulpanit, Suravee
2024-10-16  5:17 ` [PATCH v6 8/9] iommu/amd: Modify clear_dte_entry() to avoid in-place update Suravee Suthikulpanit
2024-10-16  5:17 ` [PATCH v6 9/9] iommu/amd: Lock DTE before updating the entry with WRITE_ONCE() Suravee Suthikulpanit
2024-10-16 14:22 ` [PATCH v6 0/9] iommu/amd: Use 128-bit cmpxchg operation to update DTE Jason Gunthorpe
2024-10-31  9:15   ` Suthikulpanit, Suravee
2024-10-31 11:33     ` Jason Gunthorpe

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