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From: Niklas Cassel <cassel@kernel.org>
To: "Jingoo Han" <jingoohan1@gmail.com>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>
Cc: Damien Le Moal <dlemoal@kernel.org>,
	Niklas Cassel <cassel@kernel.org>,
	linux-pci@vger.kernel.org
Subject: [PATCH 1/2] PCI: dwc: ep: Fix dw_pcie_ep_align_addr()
Date: Thu, 17 Oct 2024 15:20:54 +0200	[thread overview]
Message-ID: <20241017132052.4014605-5-cassel@kernel.org> (raw)
In-Reply-To: <20241017132052.4014605-4-cassel@kernel.org>

ep->page_size is defined by the EPC drivers.
Some drivers e.g. pci-imx6.c defines this to 4K for imx95.

dw_pcie_ep_init() will call pci_epc_mem_init() with ep->page_size.
pci_epc_mem_init() will call pci_epc_multi_mem_init().

pci_epc_multi_mem_init() will initialize mem->window.page_size.
If the provided page_size (ep->page_size) is smaller than PAGE_SIZE,
it will initialize mem->window.page_size to PAGE_SIZE rather than
ep->page_size.

Thus, mem->window.page_size can be larger than ep->page_size, e.g.
for a platform built with PAGE_SIZE == 64K, while using a EPC driver
that defines ep->page_size to 4k.

Therefore, modify dw_pcie_ep_align_addr() to use
epc->mem->window.page_size rather than ep->page_size.

Signed-off-by: Niklas Cassel <cassel@kernel.org>
---
 drivers/pci/controller/dwc/pcie-designware-ep.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
index 2d0e7bf17919..20f67fd85e83 100644
--- a/drivers/pci/controller/dwc/pcie-designware-ep.c
+++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
@@ -276,7 +276,7 @@ static u64 dw_pcie_ep_align_addr(struct pci_epc *epc, u64 pci_addr,
 	u64 mask = pci->region_align - 1;
 	size_t ofst = pci_addr & mask;
 
-	*pci_size = ALIGN(ofst + *pci_size, ep->page_size);
+	*pci_size = ALIGN(ofst + *pci_size, epc->mem->window.page_size);
 	*offset = ofst;
 
 	return pci_addr & ~mask;
-- 
2.47.0


  reply	other threads:[~2024-10-17 13:21 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-17 13:20 [PATCH 0/2] PCI: dwc: ep: Minor alignment cleanups Niklas Cassel
2024-10-17 13:20 ` Niklas Cassel [this message]
2024-10-17 15:33   ` [PATCH 1/2] PCI: dwc: ep: Fix dw_pcie_ep_align_addr() Frank Li
2024-11-01  7:12   ` Manivannan Sadhasivam
2024-11-02 11:37     ` Krzysztof Wilczyński
2024-10-17 13:20 ` [PATCH 2/2] PCI: dwc: ep: Use align addr function for dw_pcie_ep_raise_{msi,msix}_irq() Niklas Cassel
2024-10-17 15:36   ` Frank Li
2024-10-17 18:54     ` Niklas Cassel
2024-10-17 19:36       ` Frank Li
2024-10-31 20:28   ` Bjorn Helgaas
2024-10-31 22:36     ` Damien Le Moal
2024-11-01 18:25       ` Niklas Cassel
2024-11-01  7:16   ` Manivannan Sadhasivam
2024-11-02 11:41   ` Krzysztof Wilczyński
2024-10-20  0:59 ` [PATCH 0/2] PCI: dwc: ep: Minor alignment cleanups Damien Le Moal
2024-10-29 10:25 ` Niklas Cassel

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