All of lore.kernel.org
 help / color / mirror / Atom feed
From: Lu Baolu <baolu.lu@linux.intel.com>
To: Joerg Roedel <joro@8bytes.org>
Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: [PATCH 07/19] iommu/vt-d: Refine intel_iommu_domain_alloc_user()
Date: Mon,  4 Nov 2024 09:40:27 +0800	[thread overview]
Message-ID: <20241104014040.106100-8-baolu.lu@linux.intel.com> (raw)
In-Reply-To: <20241104014040.106100-1-baolu.lu@linux.intel.com>

The domain_alloc_user ops should always allocate a guest-compatible page
table unless specific allocation flags are specified.

Currently, IOMMU_HWPT_ALLOC_NEST_PARENT and IOMMU_HWPT_ALLOC_DIRTY_TRACKING
require special handling, as both require hardware support for scalable
mode and second-stage translation. In such cases, the driver should select
a second-stage page table for the paging domain.

Suggested-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20241021085125.192333-8-baolu.lu@linux.intel.com
---
 drivers/iommu/intel/iommu.c | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index ebdb97835fc3..5fbf1237188c 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -3299,6 +3299,7 @@ intel_iommu_domain_alloc_user(struct device *dev, u32 flags,
 	struct intel_iommu *iommu = info->iommu;
 	struct dmar_domain *dmar_domain;
 	struct iommu_domain *domain;
+	bool first_stage;
 
 	/* Must be NESTING domain */
 	if (parent) {
@@ -3315,8 +3316,20 @@ intel_iommu_domain_alloc_user(struct device *dev, u32 flags,
 	if (user_data || (dirty_tracking && !ssads_supported(iommu)))
 		return ERR_PTR(-EOPNOTSUPP);
 
-	/* Do not use first stage for user domain translation. */
-	dmar_domain = paging_domain_alloc(dev, false);
+	/*
+	 * Always allocate the guest compatible page table unless
+	 * IOMMU_HWPT_ALLOC_NEST_PARENT or IOMMU_HWPT_ALLOC_DIRTY_TRACKING
+	 * is specified.
+	 */
+	if (nested_parent || dirty_tracking) {
+		if (!sm_supported(iommu) || !ecap_slts(iommu->ecap))
+			return ERR_PTR(-EOPNOTSUPP);
+		first_stage = false;
+	} else {
+		first_stage = first_level_by_default(iommu);
+	}
+
+	dmar_domain = paging_domain_alloc(dev, first_stage);
 	if (IS_ERR(dmar_domain))
 		return ERR_CAST(dmar_domain);
 	domain = &dmar_domain->domain;
-- 
2.43.0


  parent reply	other threads:[~2024-11-04  1:41 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-04  1:40 [PATCH 00/19] [PULL REQUEST] Intel IOMMU updates for v6.13 Lu Baolu
2024-11-04  1:40 ` [PATCH 01/19] iommu/vt-d: Add domain_alloc_paging support Lu Baolu
2024-11-04  1:40 ` [PATCH 02/19] iommu/vt-d: Remove unused domain_alloc callback Lu Baolu
2024-11-04  1:40 ` [PATCH 03/19] iommu/vt-d: Enhance compatibility check for paging domain attach Lu Baolu
2024-11-04  1:40 ` [PATCH 04/19] iommu/vt-d: Remove domain_update_iommu_cap() Lu Baolu
2024-11-04  1:40 ` [PATCH 05/19] iommu/vt-d: Remove domain_update_iommu_superpage() Lu Baolu
2024-11-04  1:40 ` [PATCH 06/19] iommu/vt-d: Refactor first_level_by_default() Lu Baolu
2024-11-04  1:40 ` Lu Baolu [this message]
2024-11-04  1:40 ` [PATCH 08/19] iommu/vt-d: Use PCI_DEVID() macro Lu Baolu
2024-11-04  1:40 ` [PATCH 09/19] iommu/vt-d: Increase buffer size for device name Lu Baolu
2024-11-04  1:40 ` [PATCH 10/19] iommu/vt-d: Remove unused dmar_msi_read Lu Baolu
2024-11-04  1:40 ` [PATCH 11/19] iommu/vt-d: Drop s1_pgtbl from dmar_domain Lu Baolu
2024-11-04  1:40 ` [PATCH 12/19] iommu/vt-d: Fix checks and print in dmar_fault_dump_ptes() Lu Baolu
2024-11-04  1:40 ` [PATCH 13/19] iommu/vt-d: Fix checks and print in pgtable_walk() Lu Baolu
2024-11-04  1:40 ` [PATCH 14/19] iommu/vt-d: Separate page request queue from SVM Lu Baolu
2024-11-04  1:40 ` [PATCH 15/19] iommu/vt-d: Remove the pasid present check in prq_event_thread Lu Baolu
2024-11-04  1:40 ` [PATCH 16/19] iommu/vt-d: Move IOMMU_IOPF into INTEL_IOMMU Lu Baolu
2024-11-04  1:40 ` [PATCH 17/19] iommufd: Enable PRI when doing the iommufd_hwpt_alloc Lu Baolu
2024-11-04  1:40 ` [PATCH 18/19] iommu/vt-d: Drop pasid requirement for prq initialization Lu Baolu
2024-11-04  1:40 ` [PATCH 19/19] iommu/vt-d: Drain PRQs when domain removed from RID Lu Baolu
2024-11-05 12:33 ` [PATCH 00/19] [PULL REQUEST] Intel IOMMU updates for v6.13 Joerg Roedel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20241104014040.106100-8-baolu.lu@linux.intel.com \
    --to=baolu.lu@linux.intel.com \
    --cc=iommu@lists.linux.dev \
    --cc=joro@8bytes.org \
    --cc=linux-kernel@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.