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* Re: [PATCH v10 20/22] arm64: dts: amlogic: s4: add crypto node
@ 2024-11-10 10:33 kernel test robot
  0 siblings, 0 replies; 4+ messages in thread
From: kernel test robot @ 2024-11-10 10:33 UTC (permalink / raw)
  To: oe-kbuild; +Cc: lkp

:::::: 
:::::: Manual check reason: "dtcheck: binding changes may go via different trees"
:::::: 

BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20241108102907.1788584-21-avromanov@salutedevices.com>
References: <20241108102907.1788584-21-avromanov@salutedevices.com>
TO: Alexey Romanov <avromanov@salutedevices.com>
TO: neil.armstrong@linaro.org
TO: clabbe@baylibre.com
TO: herbert@gondor.apana.org.au
TO: davem@davemloft.net
TO: robh+dt@kernel.org
TO: krzysztof.kozlowski+dt@linaro.org
TO: krzk+dt@kernel.org
TO: conor+dt@kernel.org
TO: khilman@baylibre.com
TO: jbrunet@baylibre.com
TO: martin.blumenstingl@googlemail.com
TO: vadim.fedorenko@linux.dev
CC: linux-crypto@vger.kernel.org
CC: linux-amlogic@lists.infradead.org
CC: linux-kernel@vger.kernel.org
CC: devicetree@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
CC: kernel@salutedevices.com
CC: Alexey Romanov <avromanov@salutedevices.com>

Hi Alexey,

kernel test robot noticed the following build warnings:

[auto build test WARNING on herbert-cryptodev-2.6/master]
[also build test WARNING on next-20241108]
[cannot apply to herbert-crypto-2.6/master robh/for-next linus/master v6.12-rc6]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Alexey-Romanov/crypto-amlogic-Don-t-hardcode-IRQ-count/20241108-183503
base:   https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git master
patch link:    https://lore.kernel.org/r/20241108102907.1788584-21-avromanov%40salutedevices.com
patch subject: [PATCH v10 20/22] arm64: dts: amlogic: s4: add crypto node
:::::: branch date: 2 days ago
:::::: commit date: 2 days ago
config: arm64-randconfig-051-20241109 (https://download.01.org/0day-ci/archive/20241110/202411101800.IGauvIQM-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 14.2.0
dtschema version: 2024.10.dev6+g12c3cd5
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241110/202411101800.IGauvIQM-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/r/202411101800.IGauvIQM-lkp@intel.com/

dtcheck warnings: (new ones prefixed by >>)
   arch/arm64/boot/dts/amlogic/meson-s4.dtsi:149.34-593.6: Warning (unit_address_vs_reg): /soc/bus@fe000000/pinctrl@4000: node has a unit name, but no reg or ranges property
   arch/arm64/boot/dts/amlogic/meson-s4.dtsi:98.16-102.5: Warning (simple_bus_reg): /soc/clk81: missing or empty reg/ranges property
   arch/arm64/boot/dts/amlogic/meson-s4.dtsi:149.34-593.6: Warning (simple_bus_reg): /soc/bus@fe000000/pinctrl@4000: missing or empty reg/ranges property
>> arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dtb: soc: clk81: 'ranges' is a required property
   	from schema $id: http://devicetree.org/schemas/simple-bus.yaml#

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

^ permalink raw reply	[flat|nested] 4+ messages in thread
* Re: [PATCH v10 20/22] arm64: dts: amlogic: s4: add crypto node
@ 2024-11-09  1:59 kernel test robot
  0 siblings, 0 replies; 4+ messages in thread
From: kernel test robot @ 2024-11-09  1:59 UTC (permalink / raw)
  To: oe-kbuild; +Cc: lkp

:::::: 
:::::: Manual check reason: "dtcheck: binding changes may go via different trees"
:::::: 

BCC: lkp@intel.com
CC: llvm@lists.linux.dev
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20241108102907.1788584-21-avromanov@salutedevices.com>
References: <20241108102907.1788584-21-avromanov@salutedevices.com>
TO: Alexey Romanov <avromanov@salutedevices.com>
TO: neil.armstrong@linaro.org
TO: clabbe@baylibre.com
TO: herbert@gondor.apana.org.au
TO: davem@davemloft.net
TO: robh+dt@kernel.org
TO: krzysztof.kozlowski+dt@linaro.org
TO: krzk+dt@kernel.org
TO: conor+dt@kernel.org
TO: khilman@baylibre.com
TO: jbrunet@baylibre.com
TO: martin.blumenstingl@googlemail.com
TO: vadim.fedorenko@linux.dev
CC: linux-crypto@vger.kernel.org
CC: linux-amlogic@lists.infradead.org
CC: linux-kernel@vger.kernel.org
CC: devicetree@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
CC: kernel@salutedevices.com
CC: Alexey Romanov <avromanov@salutedevices.com>

Hi Alexey,

kernel test robot noticed the following build warnings:

[auto build test WARNING on herbert-cryptodev-2.6/master]
[also build test WARNING on next-20241108]
[cannot apply to herbert-crypto-2.6/master robh/for-next linus/master v6.12-rc6]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Alexey-Romanov/crypto-amlogic-Don-t-hardcode-IRQ-count/20241108-183503
base:   https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git master
patch link:    https://lore.kernel.org/r/20241108102907.1788584-21-avromanov%40salutedevices.com
patch subject: [PATCH v10 20/22] arm64: dts: amlogic: s4: add crypto node
:::::: branch date: 15 hours ago
:::::: commit date: 15 hours ago
config: arm64-randconfig-003-20241109 (https://download.01.org/0day-ci/archive/20241109/202411090920.1iTEPpVV-lkp@intel.com/config)
compiler: clang version 20.0.0git (https://github.com/llvm/llvm-project 592c0fe55f6d9a811028b5f3507be91458ab2713)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241109/202411090920.1iTEPpVV-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/r/202411090920.1iTEPpVV-lkp@intel.com/

dtcheck warnings: (new ones prefixed by >>)
   arch/arm64/boot/dts/amlogic/meson-s4.dtsi:149.34-593.6: Warning (unit_address_vs_reg): /soc/bus@fe000000/pinctrl@4000: node has a unit name, but no reg or ranges property
>> arch/arm64/boot/dts/amlogic/meson-s4.dtsi:98.16-102.5: Warning (simple_bus_reg): /soc/clk81: missing or empty reg/ranges property
   arch/arm64/boot/dts/amlogic/meson-s4.dtsi:149.34-593.6: Warning (simple_bus_reg): /soc/bus@fe000000/pinctrl@4000: missing or empty reg/ranges property

vim +98 arch/arm64/boot/dts/amlogic/meson-s4.dtsi

ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  14  
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  15  / {
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  16  	cpus {
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  17  		#address-cells = <2>;
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  18  		#size-cells = <0>;
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  19  
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  20  		cpu0: cpu@0 {
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  21  			device_type = "cpu";
9af9c58a099b57 Xianwei Zhao   2022-04-08  22  			compatible = "arm,cortex-a35";
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  23  			reg = <0x0 0x0>;
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  24  			enable-method = "psci";
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  25  		};
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  26  
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  27  		cpu1: cpu@1 {
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  28  			device_type = "cpu";
9af9c58a099b57 Xianwei Zhao   2022-04-08  29  			compatible = "arm,cortex-a35";
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  30  			reg = <0x0 0x1>;
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  31  			enable-method = "psci";
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  32  		};
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  33  
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  34  		cpu2: cpu@2 {
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  35  			device_type = "cpu";
9af9c58a099b57 Xianwei Zhao   2022-04-08  36  			compatible = "arm,cortex-a35";
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  37  			reg = <0x0 0x2>;
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  38  			enable-method = "psci";
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  39  		};
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  40  
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  41  		cpu3: cpu@3 {
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  42  			device_type = "cpu";
9af9c58a099b57 Xianwei Zhao   2022-04-08  43  			compatible = "arm,cortex-a35";
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  44  			reg = <0x0 0x3>;
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  45  			enable-method = "psci";
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  46  		};
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  47  	};
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  48  
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  49  	timer {
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  50  		compatible = "arm,armv8-timer";
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  51  		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  52  			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  53  			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  54  			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  55  	};
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  56  
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  57  	psci {
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  58  		compatible = "arm,psci-1.0";
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  59  		method = "smc";
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  60  	};
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  61  
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  62  	xtal: xtal-clk {
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  63  		compatible = "fixed-clock";
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  64  		clock-frequency = <24000000>;
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  65  		clock-output-names = "xtal";
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  66  		#clock-cells = <0>;
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  67  	};
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  68  
72907de9051dc2 Xianwei Zhao   2024-04-12  69  	firmware {
72907de9051dc2 Xianwei Zhao   2024-04-12  70  		sm: secure-monitor {
72907de9051dc2 Xianwei Zhao   2024-04-12  71  			compatible = "amlogic,meson-gxbb-sm";
72907de9051dc2 Xianwei Zhao   2024-04-12  72  
085f7a298a14ed Shunzhou Jiang 2022-04-01  73  			pwrc: power-controller {
085f7a298a14ed Shunzhou Jiang 2022-04-01  74  				compatible = "amlogic,meson-s4-pwrc";
085f7a298a14ed Shunzhou Jiang 2022-04-01  75  				#power-domain-cells = <1>;
72907de9051dc2 Xianwei Zhao   2024-04-12  76  			};
72907de9051dc2 Xianwei Zhao   2024-04-12  77  		};
085f7a298a14ed Shunzhou Jiang 2022-04-01  78  	};
085f7a298a14ed Shunzhou Jiang 2022-04-01  79  
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  80  	soc {
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  81  		compatible = "simple-bus";
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  82  		#address-cells = <2>;
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  83  		#size-cells = <2>;
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  84  		ranges;
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  85  
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  86  		gic: interrupt-controller@fff01000 {
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  87  			compatible = "arm,gic-400";
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  88  			#interrupt-cells = <3>;
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  89  			#address-cells = <0>;
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  90  			interrupt-controller;
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  91  			reg = <0x0 0xfff01000 0 0x1000>,
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  92  			      <0x0 0xfff02000 0 0x2000>,
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  93  			      <0x0 0xfff04000 0 0x2000>,
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  94  			      <0x0 0xfff06000 0 0x2000>;
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  95  			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  96  		};
ac4dfd0d1d3504 Xianwei Zhao   2022-01-06  97  
874c38993f528c Alexey Romanov 2024-11-08 @98  		clk81: clk81 {

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

^ permalink raw reply	[flat|nested] 4+ messages in thread
* [PATCH v10 00/22]  Support more Amlogic SoC families in crypto driver
@ 2024-11-08 10:28 Alexey Romanov
  2024-11-08 10:29   ` Alexey Romanov
  0 siblings, 1 reply; 4+ messages in thread
From: Alexey Romanov @ 2024-11-08 10:28 UTC (permalink / raw)
  To: neil.armstrong, clabbe, herbert, davem, robh+dt,
	krzysztof.kozlowski+dt, krzk+dt, conor+dt, khilman, jbrunet,
	martin.blumenstingl, vadim.fedorenko
  Cc: linux-crypto, linux-amlogic, linux-kernel, devicetree,
	linux-arm-kernel, kernel, Alexey Romanov

Hello!

This patchset expand the funcionality of the Amlogic
crypto driver by adding support for more SoC families:
AXG, G12A, G12B, SM1, A1, S4.

Also specify and enable crypto node in device tree
for reference Amlogic devices.

Tested on GXL, AXG, G12A/B, SM1, A1 and S4 devices via
custom tests [1] and tcrypt module.

---

Changes V1 -> V2 [2]:

- Rebased over linux-next.
- Adjusted device tree bindings description.
- A1 and S4 dts use their own compatible, which is a G12 fallback.

Changes V2 -> V3 [3]:

- Fix errors in dt-bindings and device tree.
- Add new field in platform data, which determines
whether clock controller should be used for crypto IP.
- Place back MODULE_DEVICE_TABLE.
- Correct commit messages.

Changes V3 -> V4 [4]:

- Update dt-bindings as per Krzysztof Kozlowski comments.
- Fix bisection: get rid of compiler errors in some patches.

Changes V4 -> V5 [5]:

- Tested on GXL board:
  1. Fix panic detected by Corentin Labbe [6].
  2. Disable hasher backend for GXL: in its current realization
     is doesn't work. And there are no examples or docs in the
     vendor SDK.
- Fix AES-CTR realization: legacy boards (gxl, g12, axg) requires
  inversion of the keyiv at keys setup stage.
- A1 now uses its own compatible string.
- S4 uses A1 compatible as fallback.
- Code fixes based on comments Neil Atrmstrong and Rob Herring.
- Style fixes (set correct indentations)

Changes V5 -> V6 [7]:

- Fix DMA sync warning reported by Corentin Labbe [8].
- Remove CLK input from driver. Remove clk definition
  and second interrput line from crypto node inside GXL dtsi.

Changes V6 -> V7 [9]:

- Fix dt-schema: power domain now required only for A1.
- Use crypto_skcipher_ctx_dma() helper for cipher instead of
  ____cacheline_aligned.
- Add import/export functions for hasher.
- Fix commit message for patch 17, acorrding to discussion [10].

Changes V7 -> V8 [11]:

- Test patchset with CONFIG_CRYPTO_MANAGER_EXTRA_TESTS: fix some bugs
  in hasher logic.
- Use crypto crypto_ahash_ctx_dma in hasher code.
- Correct clock definition: clk81 is required for all SoC's.
- Add fixed-clock (clk81) definition for A1/S4.
- Add information (in commit messages) why different compatibles are used.

Changes V8 -> V9 [12]:

- Remove required field clk-names from dt-schema according to Rob Herring
recommendation [13].
- Fix commit order: all dt-bindings schema commits now located earlier
than any changes in device tree.
- Fix typos and add more clarifications in dt-schema patches.

Changes V9 -> V10 [14]:

- Rebased over linux-next (20241106).
- Remove patches with AES-CTR support. This was a dishonest implementation of CTR algo.
- Update commit headers in accordance with the accepted rules in each
  of the subsystems.
- Moved adding power-domains (dt-bindings) in desired commit.

Links:
  - [1] https://gist.github.com/mRrvz/3fb8943a7487ab7b943ec140706995e7
  - [2] https://lore.kernel.org/all/20240110201216.18016-1-avromanov@salutedevices.com/
  - [3] https://lore.kernel.org/all/20240123165831.970023-1-avromanov@salutedevices.com/
  - [4] https://lore.kernel.org/all/20240205155521.1795552-1-avromanov@salutedevices.com/
  - [5] https://lore.kernel.org/all/20240212135108.549755-1-avromanov@salutedevices.com/
  - [6] https://lore.kernel.org/all/ZcsYaPIUrBSg8iXu@Red/
  - [7] https://lore.kernel.org/all/20240301132936.621238-1-avromanov@salutedevices.com/
  - [8] https://lore.kernel.org/all/Zf1BAlYtiwPOG-Os@Red/
  - [9] https://lore.kernel.org/all/20240326153219.2915080-1-avromanov@salutedevices.com/
  - [10] https://lore.kernel.org/all/20240329-dotted-illusive-9f0593805a05@wendy/
  - [11] https://lore.kernel.org/all/20240411133832.2896463-1-avromanov@salutedevices.com/
  - [12] https://lore.kernel.org/all/20240607141242.2616580-1-avromanov@salutedevices.com/
  - [13] https://lore.kernel.org/all/20240610222827.GA3166929-robh@kernel.org/
  - [14] https://lore.kernel.org/all/20240820145623.3500864-1-avromanov@salutedevices.com/

Alexey Romanov (22):
  crypto: amlogic - Don't hardcode IRQ count
  crypto: amlogic - Add platform data
  crypto: amlogic - Remove clock input
  crypto: amlogic - Add MMIO helpers
  crypto: amlogic - Move get_engine_number()
  crypto: amlogic - Drop status field from meson_flow
  crypto: amlogic - Move algs definition and cipher API to cipher.c
  crypto: amlogic - Cleanup defines
  crypto: amlogic - Process more than MAXDESCS descriptors
  crypto: amlogic - Avoid kzalloc in engine thread
  crypto: amlogic - Introduce hasher
  crypto: amlogic - Use fallback for 192-bit keys
  crypto: amlogic - Add support for G12-series
  crypto: amlogic - Add support for AXG-series
  crypto: amlogic - Add support for A1-series
  dt-bindings: crypto: amlogic,gxl-crypto: correct clk and interrupt
    lines
  dt-bindings: crypto: amlogic,gxl-crypto: support new SoC's
  arm64: dts: amlogic: gxl: correct crypto node definition
  arm64: dts: amlogic: a1: add crypto node
  arm64: dts: amlogic: s4: add crypto node
  arm64: dts: amlogic: g12: add crypto node
  arm64: dts: amlogic: axg: add crypto node

 .../bindings/crypto/amlogic,gxl-crypto.yaml   |  32 +-
 arch/arm64/boot/dts/amlogic/meson-a1.dtsi     |  14 +
 arch/arm64/boot/dts/amlogic/meson-axg.dtsi    |   7 +
 .../boot/dts/amlogic/meson-g12-common.dtsi    |   7 +
 arch/arm64/boot/dts/amlogic/meson-gxl.dtsi    |   6 +-
 arch/arm64/boot/dts/amlogic/meson-s4.dtsi     |  13 +
 drivers/crypto/amlogic/Makefile               |   2 +-
 drivers/crypto/amlogic/amlogic-gxl-cipher.c   | 581 ++++++++++++------
 drivers/crypto/amlogic/amlogic-gxl-core.c     | 289 ++++-----
 drivers/crypto/amlogic/amlogic-gxl-hasher.c   | 507 +++++++++++++++
 drivers/crypto/amlogic/amlogic-gxl.h          | 113 +++-
 11 files changed, 1209 insertions(+), 362 deletions(-)
 create mode 100644 drivers/crypto/amlogic/amlogic-gxl-hasher.c

-- 
2.34.1


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end of thread, other threads:[~2024-11-10 10:33 UTC | newest]

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2024-11-10 10:33 [PATCH v10 20/22] arm64: dts: amlogic: s4: add crypto node kernel test robot
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2024-11-09  1:59 kernel test robot
2024-11-08 10:28 [PATCH v10 00/22] Support more Amlogic SoC families in crypto driver Alexey Romanov
2024-11-08 10:29 ` [PATCH v10 20/22] arm64: dts: amlogic: s4: add crypto node Alexey Romanov
2024-11-08 10:29   ` Alexey Romanov

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