[kvm-unit-test PATCH 1/3] nVMX: fixed-function performance counters could be not contiguous

[kvm-unit-test PATCH 1/3] nVMX: fixed-function performance counters could be not contiguous

[Zide Chen]

The fixed counters may not be contiguous.  Intel SDM recommends how to
use CPUID.0AH to determine if a Fixed Counter is supported:
	FxCtr[i]_is_supported := ECX[i] || (EDX[4:0] > i);

For example, it's perfectly valid to have CPUID.0AH.EDX[4:0] == 3 and
CPUID.0AH.ECX == 0x77, but checking the fixed counter index against
CPUID.0AH.EDX[4:0] only, will deem that FxCtr[6:4] are not supported.

Additionally, according to the latest Intel SDM, changed the definition
of cpuidA_edx and renamed num_counters_fixed to num_contiguous_fixed.

Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
---
 x86/vmx_tests.c | 17 ++++++++++++++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c
index ffe7064c9221..5261927ad2a4 100644
--- a/x86/vmx_tests.c
+++ b/x86/vmx_tests.c
@@ -7332,11 +7332,17 @@ union cpuidA_eax {
 	unsigned int full;
 };
 
+union cpuidA_ecx {
+	unsigned int fixed_mask;
+};
+
 union cpuidA_edx {
 	struct {
-		unsigned int num_counters_fixed:5;
+		unsigned int num_contiguous_fixed:5;
 		unsigned int bit_width_fixed:8;
-		unsigned int reserved:9;
+		unsigned int reserved1:2;
+		unsigned int anythread_deprecated:1;
+		unsigned int reserved2:16;
 	} split;
 	unsigned int full;
 };
@@ -7345,14 +7351,19 @@ static bool valid_pgc(u64 val)
 {
 	struct cpuid id;
 	union cpuidA_eax eax;
+	union cpuidA_ecx ecx;
 	union cpuidA_edx edx;
 	u64 mask;
 
 	id = cpuid(0xA);
 	eax.full = id.a;
+	ecx.fixed_mask = id.c;
 	edx.full = id.d;
+
+	/* FxCtr[i]_is_supported := ECX[i] || (EDX[4:0] > i); */
 	mask = ~(((1ull << eax.split.num_counters_gp) - 1) |
-		 (((1ull << edx.split.num_counters_fixed) - 1) << 32));
+		 (((1ull << edx.split.num_contiguous_fixed) - 1) << 32) |
+		 ((u64)ecx.fixed_mask << 32));
 
 	return !(val & mask);
 }
-- 
2.34.1

[kvm-unit-test PATCH 2/3] x86/pmu: Fixed PEBS basic record parsing issue

[Zide Chen]

If adaptive PEBS is supported, to parse the PEBS record_format[47:0],
SDM states that "This field indicates which data groups are included
in the record. The field is zero if none of the counters that triggered
the current PEBS record have their Adaptive_Record bit set. Otherwise
it contains the value of MSR_PEBS_DATA_CFG."

Without this fix, if neither IA32_PERFEVTSELx.Adaptive_Record[34] nor
IA32_FIXED_CTR_CTRL.FCx_Adaptive_Record is set on adaptive PEBS capable
systems, test will fail.

Fixes: 2cb2af7f53d ("x86/pmu: Test adaptive PEBS without any adaptive counters")
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
---
 x86/pmu_pebs.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/x86/pmu_pebs.c b/x86/pmu_pebs.c
index 77875c4fee35..6b4a5ed3b91e 100644
--- a/x86/pmu_pebs.c
+++ b/x86/pmu_pebs.c
@@ -297,6 +297,8 @@ static void check_pebs_records(u64 bitmask, u64 pebs_data_cfg, bool use_adaptive
 		pebs_idx_match = pebs_rec->applicable_counters & bitmask;
 		pebs_size_match = pebs_record_size == get_pebs_record_size(pebs_data_cfg, use_adaptive);
 		data_cfg_match = (pebs_rec->format_size & GENMASK_ULL(47, 0)) == pebs_data_cfg;
+		data_cfg_match = (pebs_rec->format_size & GENMASK_ULL(47, 0)) ==
+				 (use_adaptive ? pebs_data_cfg : 0);
 		expected = pebs_idx_match && pebs_size_match && data_cfg_match;
 		report(expected,
 		       "PEBS record (written seq %d) is verified (including size, counters and cfg).", count);
-- 
2.34.1

[kvm-unit-test PATCH 3/3] x86/pmu: Execute PEBS test only if PEBSRecordFormat >= 4

[Zide Chen]

Before adaptive PEBS v4, the PEBS record format is not determined by
MSR_PEBS_DATA_CFG, but by IA32_PERF_CAPABILITIES.PEBS_FMT[11:8] (< 4),
which is not covered by this unit test.

We don't want additional implementation to support such legacy
platforms, instead, we can exclude them from the test to avoid test
failures.

Technically, it seems checking IA32_PERF_CAPABILITIES.PEBS_BASELINE[14]
is more reasonable.  But this bit is not exposed to the guest in the
current KVM emulated vPMU implementation, and if we use it as a filter,
it will filter out all platforms.

Signed-off-by: Zide Chen <zide.chen@intel.com>
Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
---
 x86/pmu_pebs.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/x86/pmu_pebs.c b/x86/pmu_pebs.c
index 6b4a5ed3b91e..6396d51c6b49 100644
--- a/x86/pmu_pebs.c
+++ b/x86/pmu_pebs.c
@@ -404,8 +404,8 @@ int main(int ac, char **av)
 	} else if (!pmu_has_pebs()) {
 		report_skip("PEBS required PMU version 2, reported version is %d", pmu.version);
 		return report_summary();
-	} else if (!pmu_pebs_format()) {
-		report_skip("PEBS not enumerated in PERF_CAPABILITIES");
+	} else if (pmu_pebs_format() < 4) {
+		report_skip("This test supports PEBS_Record_Format >= 4 only");
 		return report_summary();
 	} else if (rdmsr(MSR_IA32_MISC_ENABLE) & MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL) {
 		report_skip("PEBS unavailable according to MISC_ENABLE");
-- 
2.34.1

Re: [kvm-unit-test PATCH 1/3] nVMX: fixed-function performance counters could be not contiguous

[Sean Christopherson]

On Mon, 18 Nov 2024 14:52:05 -0800, Zide Chen wrote:
> The fixed counters may not be contiguous.  Intel SDM recommends how to
> use CPUID.0AH to determine if a Fixed Counter is supported:
> 	FxCtr[i]_is_supported := ECX[i] || (EDX[4:0] > i);
> 
> For example, it's perfectly valid to have CPUID.0AH.EDX[4:0] == 3 and
> CPUID.0AH.ECX == 0x77, but checking the fixed counter index against
> CPUID.0AH.EDX[4:0] only, will deem that FxCtr[6:4] are not supported.
> 
> [...]

Applied to kvm-x86 next (and now pulled by Paolo), thanks!

[1/3] nVMX: fixed-function performance counters could be not contiguous
      https://github.com/kvm-x86/kvm-unit-tests/commit/d5a6cfacc5ba
[2/3] x86/pmu: Fixed PEBS basic record parsing issue
      https://github.com/kvm-x86/kvm-unit-tests/commit/1006feddb2b6
[3/3] x86/pmu: Execute PEBS test only if PEBSRecordFormat >= 4
      https://github.com/kvm-x86/kvm-unit-tests/commit/e67ba872d947

--
https://github.com/kvm-x86/kvm-unit-tests/tree/next