From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Daniel Henrique Barboza" <danielhb413@gmail.com>,
"Marcin Juszkiewicz" <marcin.juszkiewicz@linaro.org>,
"Bin Meng" <bmeng.cn@gmail.com>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Harsh Prateek Bora" <harshpb@linux.ibm.com>,
"Zhao Liu" <zhao1.liu@intel.com>,
"Daniel P . Berrangé" <berrange@redhat.com>,
"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
qemu-arm@nongnu.org, "Michael S. Tsirkin" <mst@redhat.com>,
"Nicholas Piggin" <npiggin@gmail.com>,
"Leif Lindholm" <quic_llindhol@quicinc.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
qemu-riscv@nongnu.org, "Weiwei Li" <liwei1518@gmail.com>,
"Radoslaw Biernacki" <rad@semihalf.com>,
"Thomas Huth" <thuth@redhat.com>,
"Yanan Wang" <wangyanan55@huawei.com>,
"Eduardo Habkost" <eduardo@habkost.net>,
qemu-ppc@nongnu.org
Subject: [PATCH-for-10.0 5/8] hw/arm/sbsa-ref: Set PCI_BUS_IO_ADDR0_ALLOWED flag on GPEX host bridge
Date: Mon, 25 Nov 2024 15:05:32 +0100 [thread overview]
Message-ID: <20241125140535.4526-6-philmd@linaro.org> (raw)
In-Reply-To: <20241125140535.4526-1-philmd@linaro.org>
All SBSA-Ref machines set this flag in MachineClass.
Directly set it to the GPEX bridge.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/arm/sbsa-ref.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index e3195d5449..988a0a236e 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -647,6 +647,8 @@ static void create_pcie(SBSAMachineState *sms)
int i;
dev = qdev_new(TYPE_GPEX_HOST);
+ object_property_set_bool(OBJECT(dev), "allow-io-addr0-accesses",
+ true, &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
/* Map ECAM space */
@@ -896,7 +898,6 @@ static void sbsa_ref_class_init(ObjectClass *oc, void *data)
mc->default_cpu_type = ARM_CPU_TYPE_NAME("neoverse-n2");
mc->valid_cpu_types = valid_cpu_types;
mc->max_cpus = 512;
- mc->pci_allow_0_address = true;
mc->minimum_page_bits = 12;
mc->block_default_type = IF_IDE;
mc->no_cdrom = 1;
--
2.45.2
next prev parent reply other threads:[~2024-11-25 14:09 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-25 14:05 [PATCH-for-10.0 0/8] hw/boards: Remove legacy MachineClass::pci_allow_0_address flag Philippe Mathieu-Daudé
2024-11-25 14:05 ` [PATCH-for-10.0 1/8] hw/pci/pci_bus: Introduce PCIBusFlags::PCI_BUS_IO_ADDR0_ALLOWED Philippe Mathieu-Daudé
2024-11-25 14:05 ` [PATCH-for-10.0 2/8] hw/ppc/spapr_pci: Set PCI_BUS_IO_ADDR0_ALLOWED flag in host bridge Philippe Mathieu-Daudé
2024-11-25 14:05 ` [PATCH-for-10.0 3/8] hw/pci-host/gpex: Allow machines to set PCI_BUS_IO_ADDR0_ALLOWED flag Philippe Mathieu-Daudé
2024-11-25 14:34 ` Peter Maydell
2024-11-25 14:05 ` [PATCH-for-10.0 4/8] hw/arm/virt: Set PCI_BUS_IO_ADDR0_ALLOWED flag on GPEX host bridge Philippe Mathieu-Daudé
2024-11-25 14:05 ` Philippe Mathieu-Daudé [this message]
2024-11-25 14:05 ` [PATCH-for-10.0 6/8] hw/riscv/virt: Remove pointless GPEX_HOST() cast Philippe Mathieu-Daudé
2024-11-25 14:20 ` Thomas Huth
2024-11-25 14:05 ` [PATCH-for-10.0 7/8] hw/riscv/virt: Set PCI_BUS_IO_ADDR0_ALLOWED flag on GPEX host bridge Philippe Mathieu-Daudé
2024-11-25 14:05 ` [PATCH-for-10.0 8/8] hw/pci/pci: Remove legacy MachineClass::pci_allow_0_address flag Philippe Mathieu-Daudé
2024-11-25 14:14 ` [PATCH-for-10.0 0/8] hw/boards: " Peter Maydell
2024-11-25 14:49 ` Philippe Mathieu-Daudé
2024-11-25 16:38 ` Peter Maydell
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