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From: Kever Yang <kever.yang@rock-chips.com>
To: heiko@sntech.de
Cc: linux-rockchip@lists.infradead.org,
	Kever Yang <kever.yang@rock-chips.com>,
	Conor Dooley <conor+dt@kernel.org>,
	Detlev Casanova <detlev.casanova@collabora.com>,
	Elaine Zhang <zhangqing@rock-chips.com>,
	Finley Xiao <finley.xiao@rock-chips.com>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Liang Chen <cl@rock-chips.com>, Rob Herring <robh@kernel.org>,
	Yifeng Zhao <yifeng.zhao@rock-chips.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH 2/6] dts: arm64: rockchip: Add rk3576 naneng combphy nodes
Date: Thu,  5 Dec 2024 18:36:19 +0800	[thread overview]
Message-ID: <20241205103623.878181-3-kever.yang@rock-chips.com> (raw)
In-Reply-To: <20241205103623.878181-1-kever.yang@rock-chips.com>

rk3576 has two naneng combo phy,
- combophy0 is used for one of pcie and sata;
- combophy is used for one of pcie, sata and usb3;

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 arch/arm64/boot/dts/rockchip/rk3576.dtsi | 36 ++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
index 436232ffe4d1..8938ec7c3bb4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
@@ -1587,6 +1587,42 @@ uart11: serial@2afd0000 {
 			status = "disabled";
 		};
 
+		combphy0_ps: phy@2b050000 {
+			compatible = "rockchip,rk3576-naneng-combphy";
+			reg = <0x0 0x2b050000 0x0 0x100>;
+			#phy-cells = <1>;
+			clocks = <&cru CLK_REF_PCIE0_PHY>,
+				 <&cru PCLK_PCIE2_COMBOPHY0>,
+				 <&cru PCLK_PCIE0>;
+			clock-names = "refclk", "apbclk", "pipe_clk";
+			assigned-clocks = <&cru CLK_REF_PCIE0_PHY>;
+			assigned-clock-rates = <100000000>;
+			resets = <&cru SRST_P_PCIE2_COMBOPHY0>,
+				 <&cru SRST_PCIE0_PIPE_PHY>;
+			reset-names = "combphy-apb", "combphy";
+			rockchip,pipe-grf = <&php_grf>;
+			rockchip,pipe-phy-grf = <&pipe_phy0_grf>;
+			status = "disabled";
+		};
+
+		combphy1_psu: phy@2b060000 {
+			compatible = "rockchip,rk3576-naneng-combphy";
+			reg = <0x0 0x2b060000 0x0 0x100>;
+			#phy-cells = <1>;
+			clocks = <&cru CLK_REF_PCIE1_PHY>,
+				 <&cru PCLK_PCIE2_COMBOPHY1>,
+				 <&cru PCLK_PCIE1>;
+			clock-names = "refclk", "apbclk", "pipe_clk";
+			assigned-clocks = <&cru CLK_REF_PCIE1_PHY>;
+			assigned-clock-rates = <100000000>;
+			resets = <&cru SRST_P_PCIE2_COMBOPHY1>,
+				 <&cru SRST_PCIE1_PIPE_PHY>;
+			reset-names = "combphy-apb", "combphy";
+			rockchip,pipe-grf = <&php_grf>;
+			rockchip,pipe-phy-grf = <&pipe_phy1_grf>;
+			status = "disabled";
+		};
+
 		sram: sram@3ff88000 {
 			compatible = "mmio-sram";
 			reg = <0x0 0x3ff88000 0x0 0x78000>;
-- 
2.25.1



WARNING: multiple messages have this Message-ID (diff)
From: Kever Yang <kever.yang@rock-chips.com>
To: heiko@sntech.de
Cc: linux-rockchip@lists.infradead.org,
	Kever Yang <kever.yang@rock-chips.com>,
	Conor Dooley <conor+dt@kernel.org>,
	Detlev Casanova <detlev.casanova@collabora.com>,
	Elaine Zhang <zhangqing@rock-chips.com>,
	Finley Xiao <finley.xiao@rock-chips.com>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Liang Chen <cl@rock-chips.com>, Rob Herring <robh@kernel.org>,
	Yifeng Zhao <yifeng.zhao@rock-chips.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH 2/6] dts: arm64: rockchip: Add rk3576 naneng combphy nodes
Date: Thu,  5 Dec 2024 18:36:19 +0800	[thread overview]
Message-ID: <20241205103623.878181-3-kever.yang@rock-chips.com> (raw)
In-Reply-To: <20241205103623.878181-1-kever.yang@rock-chips.com>

rk3576 has two naneng combo phy,
- combophy0 is used for one of pcie and sata;
- combophy is used for one of pcie, sata and usb3;

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 arch/arm64/boot/dts/rockchip/rk3576.dtsi | 36 ++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
index 436232ffe4d1..8938ec7c3bb4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
@@ -1587,6 +1587,42 @@ uart11: serial@2afd0000 {
 			status = "disabled";
 		};
 
+		combphy0_ps: phy@2b050000 {
+			compatible = "rockchip,rk3576-naneng-combphy";
+			reg = <0x0 0x2b050000 0x0 0x100>;
+			#phy-cells = <1>;
+			clocks = <&cru CLK_REF_PCIE0_PHY>,
+				 <&cru PCLK_PCIE2_COMBOPHY0>,
+				 <&cru PCLK_PCIE0>;
+			clock-names = "refclk", "apbclk", "pipe_clk";
+			assigned-clocks = <&cru CLK_REF_PCIE0_PHY>;
+			assigned-clock-rates = <100000000>;
+			resets = <&cru SRST_P_PCIE2_COMBOPHY0>,
+				 <&cru SRST_PCIE0_PIPE_PHY>;
+			reset-names = "combphy-apb", "combphy";
+			rockchip,pipe-grf = <&php_grf>;
+			rockchip,pipe-phy-grf = <&pipe_phy0_grf>;
+			status = "disabled";
+		};
+
+		combphy1_psu: phy@2b060000 {
+			compatible = "rockchip,rk3576-naneng-combphy";
+			reg = <0x0 0x2b060000 0x0 0x100>;
+			#phy-cells = <1>;
+			clocks = <&cru CLK_REF_PCIE1_PHY>,
+				 <&cru PCLK_PCIE2_COMBOPHY1>,
+				 <&cru PCLK_PCIE1>;
+			clock-names = "refclk", "apbclk", "pipe_clk";
+			assigned-clocks = <&cru CLK_REF_PCIE1_PHY>;
+			assigned-clock-rates = <100000000>;
+			resets = <&cru SRST_P_PCIE2_COMBOPHY1>,
+				 <&cru SRST_PCIE1_PIPE_PHY>;
+			reset-names = "combphy-apb", "combphy";
+			rockchip,pipe-grf = <&php_grf>;
+			rockchip,pipe-phy-grf = <&pipe_phy1_grf>;
+			status = "disabled";
+		};
+
 		sram: sram@3ff88000 {
 			compatible = "mmio-sram";
 			reg = <0x0 0x3ff88000 0x0 0x78000>;
-- 
2.25.1


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

  parent reply	other threads:[~2024-12-05 10:40 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-05 10:36 [PATCH 0/6] Rockchip: add Rockchip rk3576 EVB1 board Kever Yang
2024-12-05 10:36 ` Kever Yang
2024-12-05 10:36 ` [PATCH 1/6] dt-bindings: PCI: dwc: rockchip: Add rk3576 support Kever Yang
2024-12-05 10:36   ` Kever Yang
2024-12-05 11:30   ` Heiko Stübner
2024-12-05 11:30     ` Heiko Stübner
2024-12-05 17:05   ` Conor Dooley
2024-12-05 17:05     ` Conor Dooley
2024-12-05 10:36 ` Kever Yang [this message]
2024-12-05 10:36   ` [PATCH 2/6] dts: arm64: rockchip: Add rk3576 naneng combphy nodes Kever Yang
2024-12-05 10:36 ` [PATCH 3/6] dts: arm64: rockchip: Add rk3576 pcie nodes Kever Yang
2024-12-05 10:36   ` Kever Yang
2024-12-05 10:36 ` [PATCH 4/6] dt-bindings: arm: rockchip: Sort for rk3568 evb Kever Yang
2024-12-05 10:36   ` Kever Yang
2024-12-05 17:14   ` Conor Dooley
2024-12-05 17:14     ` Conor Dooley
2024-12-05 10:36 ` [PATCH 5/6] dt-bindings: arm: rockchip: Add rk3576 evb1 board Kever Yang
2024-12-05 10:36   ` Kever Yang
2024-12-05 17:14   ` Conor Dooley
2024-12-05 17:14     ` Conor Dooley
2024-12-05 10:36 ` [PATCH 6/6] arm64: dts: " Kever Yang
2024-12-05 10:36   ` Kever Yang

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