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From: Simon Horman <horms@kernel.org>
To: Karol Kolacinski <karol.kolacinski@intel.com>
Cc: intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org,
	anthony.l.nguyen@intel.com, przemyslaw.kitszel@intel.com
Subject: Re: [Intel-wired-lan] [PATCH v3 iwl-next] ice: Add in/out PTP pin delays
Date: Fri, 6 Dec 2024 13:16:35 +0000	[thread overview]
Message-ID: <20241206131635.GP2581@kernel.org> (raw)
In-Reply-To: <20241204094816.337884-2-karol.kolacinski@intel.com>

On Wed, Dec 04, 2024 at 10:46:11AM +0100, Karol Kolacinski wrote:
> HW can have different input/output delays for each of the pins.
> 
> Currently, only E82X adapters have delay compensation based on TSPLL
> config and E810 adapters have constant 1 ms compensation, both cases
> only for output delays and the same one for all pins.
> 
> E825 adapters have different delays for SDP and other pins. Those
> delays are also based on direction and input delays are different than
> output ones. This is the main reason for moving delays to pin
> description structure.
> 
> Add a field in ice_ptp_pin_desc structure to reflect that. Delay values
> are based on approximate calculations of HW delays based on HW spec.
> 
> Implement external timestamp (input) delay compensation.
> 
> Remove existing definitions and wrappers for periodic output propagation
> delays.
> 
> Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
> Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
> ---
> V2 -> V3: rebased, renamed prop_delay to prop_delay_ns, reworded commit
>           message to be more descriptive
> V1 -> V2: removed duplicate gpio_pin variable and restored missing
>           ICE_E810_E830_SYNC_DELAY

Reviewed-by: Simon Horman <horms@kernel.org>


WARNING: multiple messages have this Message-ID (diff)
From: Simon Horman <horms@kernel.org>
To: Karol Kolacinski <karol.kolacinski@intel.com>
Cc: intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org,
	anthony.l.nguyen@intel.com, przemyslaw.kitszel@intel.com
Subject: Re: [PATCH v3 iwl-next] ice: Add in/out PTP pin delays
Date: Fri, 6 Dec 2024 13:16:35 +0000	[thread overview]
Message-ID: <20241206131635.GP2581@kernel.org> (raw)
In-Reply-To: <20241204094816.337884-2-karol.kolacinski@intel.com>

On Wed, Dec 04, 2024 at 10:46:11AM +0100, Karol Kolacinski wrote:
> HW can have different input/output delays for each of the pins.
> 
> Currently, only E82X adapters have delay compensation based on TSPLL
> config and E810 adapters have constant 1 ms compensation, both cases
> only for output delays and the same one for all pins.
> 
> E825 adapters have different delays for SDP and other pins. Those
> delays are also based on direction and input delays are different than
> output ones. This is the main reason for moving delays to pin
> description structure.
> 
> Add a field in ice_ptp_pin_desc structure to reflect that. Delay values
> are based on approximate calculations of HW delays based on HW spec.
> 
> Implement external timestamp (input) delay compensation.
> 
> Remove existing definitions and wrappers for periodic output propagation
> delays.
> 
> Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
> Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
> ---
> V2 -> V3: rebased, renamed prop_delay to prop_delay_ns, reworded commit
>           message to be more descriptive
> V1 -> V2: removed duplicate gpio_pin variable and restored missing
>           ICE_E810_E830_SYNC_DELAY

Reviewed-by: Simon Horman <horms@kernel.org>


  reply	other threads:[~2024-12-06 13:16 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-04  9:46 [Intel-wired-lan] [PATCH v3 iwl-next] ice: Add in/out PTP pin delays Karol Kolacinski
2024-12-04  9:46 ` Karol Kolacinski
2024-12-06 13:16 ` Simon Horman [this message]
2024-12-06 13:16   ` Simon Horman
2024-12-30 16:44   ` [Intel-wired-lan] " Mekala, SunithaX D
2024-12-30 16:44     ` Mekala, SunithaX D

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