From: Stefan Hajnoczi <stefanha@redhat.com>
To: Alistair Francis <alistair23@gmail.com>
Cc: qemu-devel@nongnu.org, alistair23@gmail.com,
Alistair Francis <alistair.francis@wdc.com>
Subject: Re: [PULL v2 00/39] riscv-to-apply queue
Date: Sat, 21 Dec 2024 12:51:06 -0500 [thread overview]
Message-ID: <20241221175106.GA857515@fedora> (raw)
In-Reply-To: <20241220015441.317236-1-alistair.francis@wdc.com>
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Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any user-visible changes.
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prev parent reply other threads:[~2024-12-21 17:53 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-20 1:54 [PULL v2 00/39] riscv-to-apply queue Alistair Francis
2024-12-20 1:54 ` [PULL v2 01/39] hw/riscv/riscv-iommu.c: Correct the validness check of iova Alistair Francis
2024-12-20 1:54 ` [PULL v2 02/39] hw/intc/riscv_aplic: Fix APLIC in_clrip and clripnum write emulation Alistair Francis
2024-12-20 1:54 ` [PULL v2 03/39] hw/riscv/riscv-iommu.c: add riscv_iommu_instance_init() Alistair Francis
2024-12-20 1:54 ` [PULL v2 04/39] hw/riscv/riscv-iommu: parametrize CAP.IGS Alistair Francis
2024-12-20 1:54 ` [PULL v2 05/39] hw/riscv: add riscv-iommu-sys platform device Alistair Francis
2024-12-20 1:54 ` [PULL v2 06/39] hw/riscv/virt: Add IOMMU as platform device if the option is set Alistair Francis
2024-12-20 1:54 ` [PULL v2 07/39] hw/riscv/virt.c, riscv-iommu-sys.c: add MSIx support Alistair Francis
2024-12-20 1:54 ` [PULL v2 08/39] hw/riscv/riscv-iommu: implement reset protocol Alistair Francis
2024-12-20 1:54 ` [PULL v2 09/39] docs/specs: add riscv-iommu-sys information Alistair Francis
2024-12-20 1:54 ` [PULL v2 10/39] target/riscv: Add Tenstorrent Ascalon CPU Alistair Francis
2024-12-20 1:54 ` [PULL v2 11/39] hw/intc/riscv_aplic: rename is_kvm_aia() Alistair Francis
2024-12-20 1:54 ` [PULL v2 12/39] hw/riscv/virt.c: reduce virt_use_kvm_aia() usage Alistair Francis
2024-12-20 1:54 ` [PULL v2 13/39] hw/riscv/virt.c: rename helper to virt_use_kvm_aia_aplic_imsic() Alistair Francis
2024-12-20 1:54 ` [PULL v2 14/39] target/riscv/kvm: consider irqchip_split() in aia_create() Alistair Francis
2024-12-20 1:54 ` [PULL v2 15/39] hw/riscv/virt.c, riscv_aplic.c: add 'emulated_aplic' helpers Alistair Francis
2024-12-20 1:54 ` [PULL v2 16/39] hw/intc/riscv_aplic: add kvm_msicfgaddr for split mode aplic-imsic Alistair Francis
2024-12-20 1:54 ` [PULL v2 17/39] target/riscv/kvm: remove irqchip_split() restriction Alistair Francis
2024-12-20 1:54 ` [PULL v2 18/39] docs: update riscv/virt.rst with kernel-irqchip=split support Alistair Francis
2024-12-20 1:54 ` [PULL v2 19/39] hw/riscv: Add Microblaze V generic board Alistair Francis
2026-05-26 8:34 ` Philippe Mathieu-Daudé
2026-06-03 15:05 ` Sai Pavan Boddu
2024-12-20 1:54 ` [PULL v2 20/39] qtest: allow SPCR acpi table changes Alistair Francis
2024-12-20 1:54 ` [PULL v2 21/39] hw/acpi: Upgrade ACPI SPCR table to support SPCR table revision 4 format Alistair Francis
2024-12-20 1:54 ` [PULL v2 22/39] tests/qtest/bios-tables-test: Update virt SPCR golden reference for RISC-V Alistair Francis
2024-12-20 1:54 ` [PULL v2 23/39] MAINTAINERS: Cover RISC-V HTIF interface Alistair Francis
2024-12-20 1:54 ` [PULL v2 24/39] hw/char/riscv_htif: Explicit little-endian implementation Alistair Francis
2024-12-20 1:54 ` [PULL v2 25/39] hw/char/riscv_htif: Clarify MemoryRegionOps expect 32-bit accesses Alistair Francis
2024-12-20 1:54 ` [PULL v2 26/39] hw/riscv: Support to load DTB after 3GB memory on 64-bit system Alistair Francis
2024-12-20 1:54 ` [PULL v2 27/39] hw/riscv: Add a new struct RISCVBootInfo Alistair Francis
2024-12-20 1:54 ` [PULL v2 28/39] hw/riscv: Add the checking if DTB overlaps to kernel or initrd Alistair Francis
2024-12-20 1:54 ` [PULL v2 29/39] target/riscv: Add svukte extension capability variable Alistair Francis
2024-12-20 1:54 ` [PULL v2 30/39] target/riscv: Support senvcfg[UKTE] bit when svukte extension is enabled Alistair Francis
2024-12-20 1:54 ` [PULL v2 31/39] target/riscv: Support hstatus[HUKTE] " Alistair Francis
2024-12-20 1:54 ` [PULL v2 32/39] target/riscv: Check memory access to meet svukte rule Alistair Francis
2024-12-20 1:54 ` [PULL v2 33/39] target/riscv: Expose svukte ISA extension Alistair Francis
2024-12-20 1:54 ` [PULL v2 34/39] target/riscv: Check svukte is not enabled in RV32 Alistair Francis
2024-12-20 1:54 ` [PULL v2 35/39] target/riscv: Include missing headers in 'vector_internals.h' Alistair Francis
2024-12-20 1:54 ` [PULL v2 36/39] target/riscv: Include missing headers in 'internals.h' Alistair Francis
2024-12-20 1:54 ` [PULL v2 37/39] target/riscv/tcg: hide warn for named feats when disabling via priv_ver Alistair Francis
2024-12-20 1:54 ` [PULL v2 38/39] target/riscv: add ssstateen Alistair Francis
2024-12-20 1:54 ` [PULL v2 39/39] target/riscv: add support for RV64 Xiangshan Nanhu CPU Alistair Francis
2024-12-21 17:51 ` Stefan Hajnoczi [this message]
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