From: Liu Ying <victor.liu@nxp.com>
To: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org
Cc: p.zabel@pengutronix.de, airlied@gmail.com, simona@ffwll.ch,
maarten.lankhorst@linux.intel.com, mripard@kernel.org,
tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de,
kernel@pengutronix.de, festevam@gmail.com, tglx@linutronix.de,
vkoul@kernel.org, kishon@kernel.org, aisheng.dong@nxp.com,
agx@sigxcpu.org, u.kleine-koenig@baylibre.com,
francesco@dolcini.it, frank.li@nxp.com,
dmitry.baryshkov@linaro.org
Subject: [PATCH v8 02/19] dt-bindings: display: imx: Add i.MX8qxp Display Controller blit engine
Date: Mon, 30 Dec 2024 10:11:50 +0800 [thread overview]
Message-ID: <20241230021207.220144-3-victor.liu@nxp.com> (raw)
In-Reply-To: <20241230021207.220144-1-victor.liu@nxp.com>
i.MX8qxp Display Controller contains a blit engine for raster graphics.
It may read up to 3 source images from memory and computes one destination
image from it, which is written back to memory.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
---
v8:
* Drop instance numbers from compatible strings. This means switching back to
the patch in v4. So, add Rob's previous R-b tag back. (Dmitry)
v7:
* Add instance numbers to blit engine internal devices' compatible strings.
(Rob)
* Drop Rob's R-b tag.
v6:
* No change.
v5:
* No change.
v4:
* Collect Rob's R-b tag.
v3:
* New patch. (Rob)
.../imx/fsl,imx8qxp-dc-blit-engine.yaml | 204 ++++++++++++++++++
1 file changed, 204 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-blit-engine.yaml
diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-blit-engine.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-blit-engine.yaml
new file mode 100644
index 000000000000..45db6da39e20
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-blit-engine.yaml
@@ -0,0 +1,204 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-blit-engine.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX8qxp Display Controller Blit Engine
+
+description: |
+ A blit operation (block based image transfer) reads up to 3 source images
+ from memory and computes one destination image from it, which is written
+ back to memory. The following basic operations are supported:
+
+ * Buffer Fill
+ Fills a buffer with constant color
+
+ * Buffer Copy
+ Copies one source to a destination buffer.
+
+ * Image Blend
+ Combines two source images by a blending equation and writes result to
+ destination (which can be one of the sources).
+
+ * Image Rop2/3
+ Combines up to three source images by a logical equation (raster operation)
+ and writes result to destination (which can be one of the sources).
+
+ * Image Flip
+ Mirrors the source image in horizontal and/or vertical direction.
+
+ * Format Convert
+ Convert between the supported color and buffer formats.
+
+ * Color Transform
+ Modify colors by linear or non-linear transformations.
+
+ * Image Scale
+ Changes size of the source image.
+
+ * Image Rotate
+ Rotates the source image by any angle.
+
+ * Image Filter
+ Performs an FIR filter operation on the source image.
+
+ * Image Warp
+ Performs a re-sampling of the source image with any pattern. The sample
+ point positions are read from a compressed coordinate buffer.
+
+ * Buffer Pack
+ Writes an image with color components stored in up to three different
+ buffers (planar formats) into a single buffer (packed format).
+
+ * Chroma Resample
+ Converts between different YUV formats that differ in chroma sampling rate
+ (4:4:4, 4:2:2, 4:2:0).
+
+maintainers:
+ - Liu Ying <victor.liu@nxp.com>
+
+properties:
+ compatible:
+ const: fsl,imx8qxp-dc-blit-engine
+
+ reg:
+ maxItems: 2
+
+ reg-names:
+ items:
+ - const: pec
+ - const: cfg
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ ranges: true
+
+patternProperties:
+ "^blitblend@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: fsl,imx8qxp-dc-blitblend
+
+ "^clut@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: fsl,imx8qxp-dc-clut
+
+ "^fetchdecode@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: fsl,imx8qxp-dc-fetchdecode
+
+ "^fetcheco@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: fsl,imx8qxp-dc-fetcheco
+
+ "^fetchwarp@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: fsl,imx8qxp-dc-fetchwarp
+
+ "^filter@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: fsl,imx8qxp-dc-filter
+
+ "^hscaler@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: fsl,imx8qxp-dc-hscaler
+
+ "^matrix@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: fsl,imx8qxp-dc-matrix
+
+ "^rop@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: fsl,imx8qxp-dc-rop
+
+ "^store@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: fsl,imx8qxp-dc-store
+
+ "^vscaler@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: fsl,imx8qxp-dc-vscaler
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - "#address-cells"
+ - "#size-cells"
+ - ranges
+
+additionalProperties: false
+
+examples:
+ - |
+ blit-engine@56180820 {
+ compatible = "fsl,imx8qxp-dc-blit-engine";
+ reg = <0x56180820 0x13c>, <0x56181000 0x3400>;
+ reg-names = "pec", "cfg";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ fetchdecode@56180820 {
+ compatible = "fsl,imx8qxp-dc-fetchdecode";
+ reg = <0x56180820 0x10>, <0x56181000 0x404>;
+ reg-names = "pec", "cfg";
+ };
+
+ store@56180940 {
+ compatible = "fsl,imx8qxp-dc-store";
+ reg = <0x56180940 0x1c>, <0x56184000 0x5c>;
+ reg-names = "pec", "cfg";
+ interrupt-parent = <&dc0_intc>;
+ interrupts = <0>, <1>, <2>;
+ interrupt-names = "shdload", "framecomplete", "seqcomplete";
+ };
+ };
--
2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Liu Ying <victor.liu@nxp.com>
To: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org
Cc: p.zabel@pengutronix.de, airlied@gmail.com, simona@ffwll.ch,
maarten.lankhorst@linux.intel.com, mripard@kernel.org,
tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de,
kernel@pengutronix.de, festevam@gmail.com, tglx@linutronix.de,
vkoul@kernel.org, kishon@kernel.org, aisheng.dong@nxp.com,
agx@sigxcpu.org, u.kleine-koenig@baylibre.com,
francesco@dolcini.it, frank.li@nxp.com,
dmitry.baryshkov@linaro.org
Subject: [PATCH v8 02/19] dt-bindings: display: imx: Add i.MX8qxp Display Controller blit engine
Date: Mon, 30 Dec 2024 10:11:50 +0800 [thread overview]
Message-ID: <20241230021207.220144-3-victor.liu@nxp.com> (raw)
In-Reply-To: <20241230021207.220144-1-victor.liu@nxp.com>
i.MX8qxp Display Controller contains a blit engine for raster graphics.
It may read up to 3 source images from memory and computes one destination
image from it, which is written back to memory.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
---
v8:
* Drop instance numbers from compatible strings. This means switching back to
the patch in v4. So, add Rob's previous R-b tag back. (Dmitry)
v7:
* Add instance numbers to blit engine internal devices' compatible strings.
(Rob)
* Drop Rob's R-b tag.
v6:
* No change.
v5:
* No change.
v4:
* Collect Rob's R-b tag.
v3:
* New patch. (Rob)
.../imx/fsl,imx8qxp-dc-blit-engine.yaml | 204 ++++++++++++++++++
1 file changed, 204 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-blit-engine.yaml
diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-blit-engine.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-blit-engine.yaml
new file mode 100644
index 000000000000..45db6da39e20
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-blit-engine.yaml
@@ -0,0 +1,204 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-blit-engine.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX8qxp Display Controller Blit Engine
+
+description: |
+ A blit operation (block based image transfer) reads up to 3 source images
+ from memory and computes one destination image from it, which is written
+ back to memory. The following basic operations are supported:
+
+ * Buffer Fill
+ Fills a buffer with constant color
+
+ * Buffer Copy
+ Copies one source to a destination buffer.
+
+ * Image Blend
+ Combines two source images by a blending equation and writes result to
+ destination (which can be one of the sources).
+
+ * Image Rop2/3
+ Combines up to three source images by a logical equation (raster operation)
+ and writes result to destination (which can be one of the sources).
+
+ * Image Flip
+ Mirrors the source image in horizontal and/or vertical direction.
+
+ * Format Convert
+ Convert between the supported color and buffer formats.
+
+ * Color Transform
+ Modify colors by linear or non-linear transformations.
+
+ * Image Scale
+ Changes size of the source image.
+
+ * Image Rotate
+ Rotates the source image by any angle.
+
+ * Image Filter
+ Performs an FIR filter operation on the source image.
+
+ * Image Warp
+ Performs a re-sampling of the source image with any pattern. The sample
+ point positions are read from a compressed coordinate buffer.
+
+ * Buffer Pack
+ Writes an image with color components stored in up to three different
+ buffers (planar formats) into a single buffer (packed format).
+
+ * Chroma Resample
+ Converts between different YUV formats that differ in chroma sampling rate
+ (4:4:4, 4:2:2, 4:2:0).
+
+maintainers:
+ - Liu Ying <victor.liu@nxp.com>
+
+properties:
+ compatible:
+ const: fsl,imx8qxp-dc-blit-engine
+
+ reg:
+ maxItems: 2
+
+ reg-names:
+ items:
+ - const: pec
+ - const: cfg
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ ranges: true
+
+patternProperties:
+ "^blitblend@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: fsl,imx8qxp-dc-blitblend
+
+ "^clut@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: fsl,imx8qxp-dc-clut
+
+ "^fetchdecode@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: fsl,imx8qxp-dc-fetchdecode
+
+ "^fetcheco@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: fsl,imx8qxp-dc-fetcheco
+
+ "^fetchwarp@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: fsl,imx8qxp-dc-fetchwarp
+
+ "^filter@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: fsl,imx8qxp-dc-filter
+
+ "^hscaler@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: fsl,imx8qxp-dc-hscaler
+
+ "^matrix@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: fsl,imx8qxp-dc-matrix
+
+ "^rop@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: fsl,imx8qxp-dc-rop
+
+ "^store@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: fsl,imx8qxp-dc-store
+
+ "^vscaler@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: fsl,imx8qxp-dc-vscaler
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - "#address-cells"
+ - "#size-cells"
+ - ranges
+
+additionalProperties: false
+
+examples:
+ - |
+ blit-engine@56180820 {
+ compatible = "fsl,imx8qxp-dc-blit-engine";
+ reg = <0x56180820 0x13c>, <0x56181000 0x3400>;
+ reg-names = "pec", "cfg";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ fetchdecode@56180820 {
+ compatible = "fsl,imx8qxp-dc-fetchdecode";
+ reg = <0x56180820 0x10>, <0x56181000 0x404>;
+ reg-names = "pec", "cfg";
+ };
+
+ store@56180940 {
+ compatible = "fsl,imx8qxp-dc-store";
+ reg = <0x56180940 0x1c>, <0x56184000 0x5c>;
+ reg-names = "pec", "cfg";
+ interrupt-parent = <&dc0_intc>;
+ interrupts = <0>, <1>, <2>;
+ interrupt-names = "shdload", "framecomplete", "seqcomplete";
+ };
+ };
--
2.34.1
--
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linux-phy@lists.infradead.org
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next prev parent reply other threads:[~2024-12-30 2:12 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-30 2:11 [PATCH v8 00/19] Add Freescale i.MX8qxp Display Controller support Liu Ying
2024-12-30 2:11 ` Liu Ying
2024-12-30 2:11 ` [PATCH v8 01/19] dt-bindings: display: imx: Add i.MX8qxp Display Controller processing units Liu Ying
2024-12-30 2:11 ` Liu Ying
2024-12-30 2:11 ` Liu Ying [this message]
2024-12-30 2:11 ` [PATCH v8 02/19] dt-bindings: display: imx: Add i.MX8qxp Display Controller blit engine Liu Ying
2024-12-30 2:11 ` [PATCH v8 03/19] dt-bindings: display: imx: Add i.MX8qxp Display Controller display engine Liu Ying
2024-12-30 2:11 ` Liu Ying
2024-12-30 2:11 ` [PATCH v8 04/19] dt-bindings: display: imx: Add i.MX8qxp Display Controller pixel engine Liu Ying
2024-12-30 2:11 ` Liu Ying
2024-12-30 2:11 ` [PATCH v8 05/19] dt-bindings: display: imx: Add i.MX8qxp Display Controller AXI performance counter Liu Ying
2024-12-30 2:11 ` Liu Ying
2024-12-30 2:11 ` [PATCH v8 06/19] dt-bindings: display: imx: Add i.MX8qxp Display Controller command sequencer Liu Ying
2024-12-30 2:11 ` Liu Ying
2025-01-13 13:37 ` Rob Herring (Arm)
2025-01-13 13:37 ` Rob Herring (Arm)
2024-12-30 2:11 ` [PATCH v8 07/19] dt-bindings: interrupt-controller: Add i.MX8qxp Display Controller interrupt controller Liu Ying
2024-12-30 2:11 ` Liu Ying
2024-12-30 2:11 ` [PATCH v8 08/19] dt-bindings: display: imx: Add i.MX8qxp Display Controller Liu Ying
2024-12-30 2:11 ` Liu Ying
2024-12-30 2:11 ` [PATCH v8 09/19] drm/imx: Add i.MX8qxp Display Controller display engine Liu Ying
2024-12-30 2:11 ` Liu Ying
2024-12-30 12:30 ` Dmitry Baryshkov
2024-12-30 12:30 ` Dmitry Baryshkov
2024-12-30 2:11 ` [PATCH v8 10/19] drm/imx: Add i.MX8qxp Display Controller pixel engine Liu Ying
2024-12-30 2:11 ` Liu Ying
2024-12-30 12:30 ` Dmitry Baryshkov
2024-12-30 12:30 ` Dmitry Baryshkov
2024-12-30 2:11 ` [PATCH v8 11/19] drm/imx: Add i.MX8qxp Display Controller interrupt controller Liu Ying
2024-12-30 2:11 ` Liu Ying
2024-12-30 2:12 ` [PATCH v8 12/19] drm/imx: Add i.MX8qxp Display Controller KMS Liu Ying
2024-12-30 2:12 ` Liu Ying
2024-12-30 2:12 ` [PATCH v8 13/19] MAINTAINERS: Add maintainer for i.MX8qxp Display Controller Liu Ying
2024-12-30 2:12 ` Liu Ying
2025-02-05 2:39 ` Liu Ying
2025-02-05 2:39 ` Liu Ying
2025-02-06 16:34 ` Maxime Ripard
2025-02-06 16:34 ` Maxime Ripard
2024-12-30 2:12 ` [DO NOT MERGE PATCH v8 14/19] dt-bindings: phy: mixel, mipi-dsi-phy: Allow assigned-clock* properties Liu Ying
2024-12-30 2:12 ` Liu Ying
2024-12-30 2:12 ` [DO NOT MERGE PATCH v8 15/19] dt-bindings: firmware: imx: Add SCU controlled display pixel link nodes Liu Ying
2024-12-30 2:12 ` Liu Ying
2024-12-30 2:12 ` [DO NOT MERGE PATCH v8 16/19] arm64: dts: imx8qxp: Add display controller subsystem Liu Ying
2024-12-30 2:12 ` Liu Ying
2024-12-30 2:12 ` [DO NOT MERGE PATCH v8 17/19] arm64: dts: imx8qxp: Add MIPI-LVDS combo subsystems Liu Ying
2024-12-30 2:12 ` Liu Ying
2024-12-30 2:12 ` [DO NOT MERGE PATCH v8 18/19] arm64: dts: imx8qxp-mek: Enable display controller Liu Ying
2024-12-30 2:12 ` Liu Ying
2024-12-30 2:12 ` [DO NOT MERGE PATCH v8 19/19] arm64: dts: imx8qxp-mek: Add MX8-DLVDS-LCD1 display module support Liu Ying
2024-12-30 2:12 ` Liu Ying
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