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From: Xu Lu <luxu.kernel@bytedance.com>
To: tjeznach@rivosinc.com, joro@8bytes.org, will@kernel.org
Cc: lihangjing@bytedance.com, xieyongji@bytedance.com,
	guojinhui.liam@bytedance.com, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org, Xu Lu <luxu.kernel@bytedance.com>
Subject: [PATCH RESEND 1/2] iommu/riscv: Empty iommu queue before enabling it
Date: Fri,  3 Jan 2025 17:32:19 +0800	[thread overview]
Message-ID: <20250103093220.38106-2-luxu.kernel@bytedance.com> (raw)
In-Reply-To: <20250103093220.38106-1-luxu.kernel@bytedance.com>

Changing cqen/fqen/pqen from 0 to 1 sets the cqh/fqt/pqt registers to 0.
But the cqt/fqh/pqh registers are left unmodified. This commit resets
cqt/fqh/pqh registers to ensure corresponding queues are empty before
being enabled during initialization.

Signed-off-by: Xu Lu <luxu.kernel@bytedance.com>
---
 drivers/iommu/riscv/iommu.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c
index 8a05def774bd..84806724f568 100644
--- a/drivers/iommu/riscv/iommu.c
+++ b/drivers/iommu/riscv/iommu.c
@@ -240,6 +240,12 @@ static int riscv_iommu_queue_enable(struct riscv_iommu_device *iommu,
 		return rc;
 	}
 
+	/* Empty queue before enabling it */
+	if (queue->qid == RISCV_IOMMU_INTR_CQ)
+		riscv_iommu_writel(queue->iommu, Q_TAIL(queue), 0);
+	else
+		riscv_iommu_writel(queue->iommu, Q_HEAD(queue), 0);
+
 	/*
 	 * Enable queue with interrupts, clear any memory fault if any.
 	 * Wait for the hardware to acknowledge request and activate queue
-- 
2.20.1


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WARNING: multiple messages have this Message-ID (diff)
From: Xu Lu <luxu.kernel@bytedance.com>
To: tjeznach@rivosinc.com, joro@8bytes.org, will@kernel.org
Cc: lihangjing@bytedance.com, xieyongji@bytedance.com,
	guojinhui.liam@bytedance.com, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org, Xu Lu <luxu.kernel@bytedance.com>
Subject: [PATCH RESEND 1/2] iommu/riscv: Empty iommu queue before enabling it
Date: Fri,  3 Jan 2025 17:32:19 +0800	[thread overview]
Message-ID: <20250103093220.38106-2-luxu.kernel@bytedance.com> (raw)
In-Reply-To: <20250103093220.38106-1-luxu.kernel@bytedance.com>

Changing cqen/fqen/pqen from 0 to 1 sets the cqh/fqt/pqt registers to 0.
But the cqt/fqh/pqh registers are left unmodified. This commit resets
cqt/fqh/pqh registers to ensure corresponding queues are empty before
being enabled during initialization.

Signed-off-by: Xu Lu <luxu.kernel@bytedance.com>
---
 drivers/iommu/riscv/iommu.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c
index 8a05def774bd..84806724f568 100644
--- a/drivers/iommu/riscv/iommu.c
+++ b/drivers/iommu/riscv/iommu.c
@@ -240,6 +240,12 @@ static int riscv_iommu_queue_enable(struct riscv_iommu_device *iommu,
 		return rc;
 	}
 
+	/* Empty queue before enabling it */
+	if (queue->qid == RISCV_IOMMU_INTR_CQ)
+		riscv_iommu_writel(queue->iommu, Q_TAIL(queue), 0);
+	else
+		riscv_iommu_writel(queue->iommu, Q_HEAD(queue), 0);
+
 	/*
 	 * Enable queue with interrupts, clear any memory fault if any.
 	 * Wait for the hardware to acknowledge request and activate queue
-- 
2.20.1


  reply	other threads:[~2025-01-03  9:32 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-03  9:32 [PATCH RESEND 0/2] riscv: iommu: Add shutdown callback for kexec Xu Lu
2025-01-03  9:32 ` Xu Lu
2025-01-03  9:32 ` Xu Lu [this message]
2025-01-03  9:32   ` [PATCH RESEND 1/2] iommu/riscv: Empty iommu queue before enabling it Xu Lu
2025-01-03  9:32 ` [PATCH RESEND 2/2] iommu/riscv: Add shutdown function for iommu driver Xu Lu
2025-01-03  9:32   ` Xu Lu
2025-01-06 11:39 ` [PATCH RESEND 0/2] riscv: iommu: Add shutdown callback for kexec Joerg Roedel
2025-01-06 11:39   ` Joerg Roedel
2025-02-03 19:15 ` patchwork-bot+linux-riscv
2025-02-03 19:15   ` patchwork-bot+linux-riscv

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