From: Niklas Cassel <cassel@kernel.org>
To: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Heiko Stuebner" <heiko@sntech.de>,
"Kishon Vijay Abraham I" <kishon@kernel.org>
Cc: Damien Le Moal <dlemoal@kernel.org>,
Niklas Cassel <cassel@kernel.org>,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org
Subject: [PATCH v2 0/6] PCI: endpoint: Add support for resizable BARs
Date: Thu, 9 Jan 2025 10:06:52 +0100 [thread overview]
Message-ID: <20250109090652.110905-8-cassel@kernel.org> (raw)
The PCI endpoint framework currently does not support resizable BARs.
Add a new BAR type BAR_RESIZABLE, so that EPC drivers can support resizable
BARs properly.
For a resizable BAR, we will only allow a single supported size.
This is by design, as we do not need/want the complexity of the host side
resizing our resizable BAR.
In the DWC driver specifically, the DWC driver currently handles resizable
BARs using an ugly hack where a resizable BAR is force set to a fixed size
BAR with 1 MB size if detected. This is bogus, as a resizable BAR can be
configured to sizes other than 1 MB.
With these changes, an EPF driver will be able to call pci_epc_set_bar()
to configure a resizable BAR to an arbitrary size, just like for
BAR_PROGRAMMABLE. Thus, DWC based EPF drivers will no longer be forced to
a bogus 1 MB forced size for resizable BARs.
Tested/verified on a Radxa Rock 5b (rk3588) by:
-Modifying pci-epf-test.c to request BAR sizes that are larger than 1 MB:
-static size_t bar_size[] = { 512, 512, 1024, 16384, 131072, 1048576 };
+static size_t bar_size[] = { SZ_1M, SZ_1M, SZ_2M, SZ_2M, SZ_4M, SZ_4M };
(Make sure to set CONFIG_CMA_ALIGNMENT=10 such that dma_alloc_coherent()
calls are aligned even for allocations larger than 1 MB.)
-Rebooting the host to make sure that the DWC EP driver configures the BARs
correctly after receiving a link down event.
-Modifying EPC features to configure a BAR as 64-bit, to make sure that we
handle 64-bit BARs correctly.
-Modifying the DWC EP driver to set a size larger than 2 GB, to make sure
we handle BAR sizes larger than 2 GB (for 64-bit BARs) correctly.
-Running the consecutive BAR test in pci_endpoint_test.c to make sure that
the address translation works correctly.
Changes since V1:
-Fix Wtautological-constant-out-of-range-compare compiler warning on
32-bit builds.
Kind regards,
Niklas
Niklas Cassel (6):
PCI: endpoint: Add BAR type BAR_RESIZABLE
PCI: dwc: ep: Move dw_pcie_ep_find_ext_capability()
PCI: dwc: endpoint: Add support for BAR type BAR_RESIZABLE
PCI: keystone: Describe resizable BARs as resizable BARs
PCI: keystone: Specify correct alignment requirement
PCI: dw-rockchip: Describe resizable BARs as resizable BARs
drivers/pci/controller/dwc/pci-keystone.c | 6 +-
.../pci/controller/dwc/pcie-designware-ep.c | 228 +++++++++++++++---
drivers/pci/controller/dwc/pcie-dw-rockchip.c | 22 +-
drivers/pci/endpoint/pci-epf-core.c | 4 +
include/linux/pci-epc.h | 3 +
5 files changed, 216 insertions(+), 47 deletions(-)
--
2.47.1
WARNING: multiple messages have this Message-ID (diff)
From: Niklas Cassel <cassel@kernel.org>
To: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Heiko Stuebner" <heiko@sntech.de>,
"Kishon Vijay Abraham I" <kishon@kernel.org>
Cc: Damien Le Moal <dlemoal@kernel.org>,
Niklas Cassel <cassel@kernel.org>,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org
Subject: [PATCH v2 0/6] PCI: endpoint: Add support for resizable BARs
Date: Thu, 9 Jan 2025 10:06:52 +0100 [thread overview]
Message-ID: <20250109090652.110905-8-cassel@kernel.org> (raw)
The PCI endpoint framework currently does not support resizable BARs.
Add a new BAR type BAR_RESIZABLE, so that EPC drivers can support resizable
BARs properly.
For a resizable BAR, we will only allow a single supported size.
This is by design, as we do not need/want the complexity of the host side
resizing our resizable BAR.
In the DWC driver specifically, the DWC driver currently handles resizable
BARs using an ugly hack where a resizable BAR is force set to a fixed size
BAR with 1 MB size if detected. This is bogus, as a resizable BAR can be
configured to sizes other than 1 MB.
With these changes, an EPF driver will be able to call pci_epc_set_bar()
to configure a resizable BAR to an arbitrary size, just like for
BAR_PROGRAMMABLE. Thus, DWC based EPF drivers will no longer be forced to
a bogus 1 MB forced size for resizable BARs.
Tested/verified on a Radxa Rock 5b (rk3588) by:
-Modifying pci-epf-test.c to request BAR sizes that are larger than 1 MB:
-static size_t bar_size[] = { 512, 512, 1024, 16384, 131072, 1048576 };
+static size_t bar_size[] = { SZ_1M, SZ_1M, SZ_2M, SZ_2M, SZ_4M, SZ_4M };
(Make sure to set CONFIG_CMA_ALIGNMENT=10 such that dma_alloc_coherent()
calls are aligned even for allocations larger than 1 MB.)
-Rebooting the host to make sure that the DWC EP driver configures the BARs
correctly after receiving a link down event.
-Modifying EPC features to configure a BAR as 64-bit, to make sure that we
handle 64-bit BARs correctly.
-Modifying the DWC EP driver to set a size larger than 2 GB, to make sure
we handle BAR sizes larger than 2 GB (for 64-bit BARs) correctly.
-Running the consecutive BAR test in pci_endpoint_test.c to make sure that
the address translation works correctly.
Changes since V1:
-Fix Wtautological-constant-out-of-range-compare compiler warning on
32-bit builds.
Kind regards,
Niklas
Niklas Cassel (6):
PCI: endpoint: Add BAR type BAR_RESIZABLE
PCI: dwc: ep: Move dw_pcie_ep_find_ext_capability()
PCI: dwc: endpoint: Add support for BAR type BAR_RESIZABLE
PCI: keystone: Describe resizable BARs as resizable BARs
PCI: keystone: Specify correct alignment requirement
PCI: dw-rockchip: Describe resizable BARs as resizable BARs
drivers/pci/controller/dwc/pci-keystone.c | 6 +-
.../pci/controller/dwc/pcie-designware-ep.c | 228 +++++++++++++++---
drivers/pci/controller/dwc/pcie-dw-rockchip.c | 22 +-
drivers/pci/endpoint/pci-epf-core.c | 4 +
include/linux/pci-epc.h | 3 +
5 files changed, 216 insertions(+), 47 deletions(-)
--
2.47.1
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Linux-rockchip@lists.infradead.org
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next reply other threads:[~2025-01-09 9:13 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-09 9:06 Niklas Cassel [this message]
2025-01-09 9:06 ` [PATCH v2 0/6] PCI: endpoint: Add support for resizable BARs Niklas Cassel
2025-01-09 9:06 ` [PATCH v2 1/6] PCI: endpoint: Add BAR type BAR_RESIZABLE Niklas Cassel
2025-01-09 9:06 ` [PATCH v2 2/6] PCI: dwc: ep: Move dw_pcie_ep_find_ext_capability() Niklas Cassel
2025-01-09 9:06 ` [PATCH v2 3/6] PCI: dwc: endpoint: Add support for BAR type BAR_RESIZABLE Niklas Cassel
2025-01-09 9:06 ` [PATCH v2 4/6] PCI: keystone: Describe resizable BARs as resizable BARs Niklas Cassel
2025-01-09 9:06 ` [PATCH v2 5/6] PCI: keystone: Specify correct alignment requirement Niklas Cassel
2025-01-09 9:06 ` [PATCH v2 6/6] PCI: dw-rockchip: Describe resizable BARs as resizable BARs Niklas Cassel
2025-01-09 9:06 ` Niklas Cassel
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