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From: paul-pl.chen <paul-pl.chen@mediatek.com>
To: <robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>,
	<chunkuang.hu@kernel.org>,
	<angelogioacchino.delregno@collabora.com>
Cc: <matthias.bgg@gmail.com>, <p.zabel@pengutronix.de>,
	<jason-jh.lin@mediatek.com>, <nancy.lin@mediatek.com>,
	<singo.chang@mediatek.com>, <xiandong.wang@mediatek.com>,
	<sirius.wang@mediatek.com>, <paul-pl.chen@mediatek.com>,
	<sunny.shen@mediatek.com>, <fshao@chromium.org>,
	<treapking@chromium.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <dri-devel@lists.freedesktop.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: [PATCH 05/12] dt-bindings: display: mediatek: add OUTPROC yaml for MT8196
Date: Fri, 10 Jan 2025 20:34:01 +0800	[thread overview]
Message-ID: <20250110123835.2719824-7-paul-pl.chen@mediatek.com> (raw)
In-Reply-To: <20250110123835.2719824-1-paul-pl.chen@mediatek.com>

From: "Paul-pl.Chen" <paul-pl.chen@mediatek.com>

Add mediate,outproc.yaml to support OUTPROC for MT8196.

Signed-off-by: Paul-pl.Chen <paul-pl.chen@mediatek.com>
---
The header used in examples: 
#include <dt-bindings/clock/mt8196-clk.h>
is not upstreamed yet. 

It will be sent by related owner soon.
---
 .../display/mediatek/mediatek,outproc.yaml    | 57 +++++++++++++++++++
 1 file changed, 57 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,outproc.yaml

diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,outproc.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,outproc.yaml
new file mode 100644
index 000000000000..b304ae41420f
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,outproc.yaml
@@ -0,0 +1,57 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/mediatek/mediatek,outproc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek display overlap output processor
+
+maintainers:
+  - Chun-Kuang Hu <chunkuang.hu@kernel.org>
+  - Philipp Zabel <p.zabel@pengutronix.de>
+
+description: |
+  MediaTek display overlap output processor, namely OVL_OUTPROC or OUTPROC,
+  handles the post-stage of pixel processing in the overlapping procedure.
+  OVL_OUTPROC manages pixels for gamma correction and ensures that pixel
+  values are within the correct range.
+
+properties:
+  compatible:
+    const: mediatek,mt8196-outproc
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: Overlap Output Processor Clock
+
+  interrupts:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - interrupts
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/mt8196-clk.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    soc {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        disp_ovl0_outproc0: outproc@32970000 {
+            compatible = "mediatek,mt8196-outproc";
+            reg = <0 0x32970000 0 0x1000>;
+            clocks = <&ovlsys_config_clk CLK_OVL_OUTPROC0_DISP>;
+            interrupts = <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH 0>;
+        };
+    };
-- 
2.34.1



WARNING: multiple messages have this Message-ID (diff)
From: paul-pl.chen <paul-pl.chen@mediatek.com>
To: <robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>,
	<chunkuang.hu@kernel.org>,
	<angelogioacchino.delregno@collabora.com>
Cc: devicetree@vger.kernel.org, xiandong.wang@mediatek.com,
	jason-jh.lin@mediatek.com, singo.chang@mediatek.com,
	treapking@chromium.org, linux-kernel@vger.kernel.org,
	dri-devel@lists.freedesktop.org,
	Project_Global_Chrome_Upstream_Group@mediatek.com,
	paul-pl.chen@mediatek.com, nancy.lin@mediatek.com,
	linux-mediatek@lists.infradead.org, sunny.shen@mediatek.com,
	p.zabel@pengutronix.de, sirius.wang@mediatek.com,
	matthias.bgg@gmail.com, linux-arm-kernel@lists.infradead.org
Subject: [PATCH 05/12] dt-bindings: display: mediatek: add OUTPROC yaml for MT8196
Date: Fri, 10 Jan 2025 20:34:01 +0800	[thread overview]
Message-ID: <20250110123835.2719824-7-paul-pl.chen@mediatek.com> (raw)
In-Reply-To: <20250110123835.2719824-1-paul-pl.chen@mediatek.com>

From: "Paul-pl.Chen" <paul-pl.chen@mediatek.com>

Add mediate,outproc.yaml to support OUTPROC for MT8196.

Signed-off-by: Paul-pl.Chen <paul-pl.chen@mediatek.com>
---
The header used in examples: 
#include <dt-bindings/clock/mt8196-clk.h>
is not upstreamed yet. 

It will be sent by related owner soon.
---
 .../display/mediatek/mediatek,outproc.yaml    | 57 +++++++++++++++++++
 1 file changed, 57 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,outproc.yaml

diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,outproc.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,outproc.yaml
new file mode 100644
index 000000000000..b304ae41420f
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,outproc.yaml
@@ -0,0 +1,57 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/mediatek/mediatek,outproc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek display overlap output processor
+
+maintainers:
+  - Chun-Kuang Hu <chunkuang.hu@kernel.org>
+  - Philipp Zabel <p.zabel@pengutronix.de>
+
+description: |
+  MediaTek display overlap output processor, namely OVL_OUTPROC or OUTPROC,
+  handles the post-stage of pixel processing in the overlapping procedure.
+  OVL_OUTPROC manages pixels for gamma correction and ensures that pixel
+  values are within the correct range.
+
+properties:
+  compatible:
+    const: mediatek,mt8196-outproc
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: Overlap Output Processor Clock
+
+  interrupts:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - interrupts
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/mt8196-clk.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    soc {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        disp_ovl0_outproc0: outproc@32970000 {
+            compatible = "mediatek,mt8196-outproc";
+            reg = <0 0x32970000 0 0x1000>;
+            clocks = <&ovlsys_config_clk CLK_OVL_OUTPROC0_DISP>;
+            interrupts = <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH 0>;
+        };
+    };
-- 
2.34.1



  parent reply	other threads:[~2025-01-10 12:42 UTC|newest]

Thread overview: 108+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-10 12:33 [PATCH 00/12] Add Mediatek Soc DRM support for mt8196 paul-pl.chen
2025-01-10 12:33 ` paul-pl.chen
2025-01-10 12:33 ` [PATCH 01/12] dt-bindings: arm: mediatek: mmsys: add compatible for MT8196 paul-pl.chen
2025-01-10 12:33   ` paul-pl.chen
2025-01-10 12:58   ` Krzysztof Kozlowski
2025-01-10 12:58     ` Krzysztof Kozlowski
2025-01-13 11:25     ` Fei Shao
2025-01-13 11:30       ` Krzysztof Kozlowski
2025-01-15  9:18     ` Paul-pl Chen (陳柏霖)
2025-01-15  9:18       ` Paul-pl Chen (陳柏霖)
2025-01-15  9:18       ` Paul-pl Chen (陳柏霖)
2025-01-10 12:33 ` [PATCH 02/12] dt-bindings: soc: mediatek: add mutex yaml " paul-pl.chen
2025-01-10 12:33   ` paul-pl.chen
2025-01-10 12:33 ` [PATCH 03/12] dt-bindings: display: mediatek: add EXDMA " paul-pl.chen
2025-01-10 12:33   ` paul-pl.chen
2025-01-10 13:01   ` Krzysztof Kozlowski
2025-01-10 13:01     ` Krzysztof Kozlowski
2025-01-17 10:36     ` Paul-pl Chen (陳柏霖)
2025-01-17 10:36       ` Paul-pl Chen (陳柏霖)
2025-01-17 10:36       ` Paul-pl Chen (陳柏霖)
2025-01-18  8:37       ` Krzysztof Kozlowski
2025-01-18  8:37         ` Krzysztof Kozlowski
2025-01-21 17:07         ` Paul-pl Chen (陳柏霖)
2025-01-21 17:07           ` Paul-pl Chen (陳柏霖)
2025-01-21 17:07           ` Paul-pl Chen (陳柏霖)
2025-02-11  8:23         ` Paul-pl Chen (陳柏霖)
2025-02-11  8:23           ` Paul-pl Chen (陳柏霖)
2025-02-11  8:23           ` Paul-pl Chen (陳柏霖)
2025-02-12  5:40           ` Krzysztof Kozlowski
2025-02-12  5:40             ` Krzysztof Kozlowski
2025-01-10 12:33 ` paul-pl.chen
2025-01-10 12:33   ` paul-pl.chen
2025-01-10 13:54   ` Rob Herring (Arm)
2025-01-10 13:54     ` Rob Herring (Arm)
2025-01-14  5:49     ` Paul-pl Chen (陳柏霖)
2025-01-14  5:49       ` Paul-pl Chen (陳柏霖)
2025-01-14  5:49       ` Paul-pl Chen (陳柏霖)
2025-01-14 10:34       ` AngeloGioacchino Del Regno
2025-01-14 10:34         ` AngeloGioacchino Del Regno
2025-01-15 12:13         ` Paul-pl Chen (陳柏霖)
2025-01-15 12:13           ` Paul-pl Chen (陳柏霖)
2025-01-15 12:13           ` Paul-pl Chen (陳柏霖)
2025-01-18  9:22       ` Krzysztof Kozlowski
2025-01-18  9:22         ` Krzysztof Kozlowski
2025-01-21 17:14         ` Paul-pl Chen (陳柏霖)
2025-01-21 17:14           ` Paul-pl Chen (陳柏霖)
2025-01-21 17:14           ` Paul-pl Chen (陳柏霖)
2025-01-23  6:11         ` Paul-pl Chen (陳柏霖)
2025-01-23  6:11           ` Paul-pl Chen (陳柏霖)
2025-01-23  6:11           ` Paul-pl Chen (陳柏霖)
2025-01-23  6:25           ` Chen-Yu Tsai
2025-01-23  6:25             ` Chen-Yu Tsai
2025-01-23 16:09             ` Paul-pl Chen (陳柏霖)
2025-01-23 16:09               ` Paul-pl Chen (陳柏霖)
2025-01-23 16:09               ` Paul-pl Chen (陳柏霖)
2025-01-23  7:21           ` Krzysztof Kozlowski
2025-01-23  7:21             ` Krzysztof Kozlowski
2025-01-23 16:14             ` Paul-pl Chen (陳柏霖)
2025-01-23 16:14               ` Paul-pl Chen (陳柏霖)
2025-01-23 16:14               ` Paul-pl Chen (陳柏霖)
2025-01-23 16:20               ` Chen-Yu Tsai
2025-01-23 16:20                 ` Chen-Yu Tsai
2025-01-10 12:34 ` [PATCH 04/12] dt-bindings: display: mediatek: add BLENDER " paul-pl.chen
2025-01-10 12:34   ` paul-pl.chen
2025-01-10 13:54   ` Rob Herring (Arm)
2025-01-10 13:54     ` Rob Herring (Arm)
2025-01-10 12:34 ` paul-pl.chen [this message]
2025-01-10 12:34   ` [PATCH 05/12] dt-bindings: display: mediatek: add OUTPROC " paul-pl.chen
2025-01-10 13:54   ` Rob Herring (Arm)
2025-01-10 13:54     ` Rob Herring (Arm)
2025-01-10 12:34 ` [PATCH 06/12] soc: mediatek: add mmsys support " paul-pl.chen
2025-01-10 12:34   ` paul-pl.chen
2025-01-10 12:34 ` [PATCH 07/12] soc: mediatek: mutex: add mutex " paul-pl.chen
2025-01-10 12:34   ` paul-pl.chen
2025-01-20  8:04   ` Chen-Yu Tsai
2025-01-10 12:34 ` [PATCH 08/12] drm/mediatek: add EXDMA " paul-pl.chen
2025-01-10 12:34   ` paul-pl.chen
2025-01-16  1:45   ` CK Hu (胡俊光)
2025-01-16  1:45     ` CK Hu (胡俊光)
2025-01-20  9:54   ` Chen-Yu Tsai
2025-01-10 12:34 ` [PATCH 09/12] drm/mediatek: add BLENDER " paul-pl.chen
2025-01-10 12:34   ` paul-pl.chen
2025-02-12  3:45   ` CK Hu (胡俊光)
2025-02-12  3:45     ` CK Hu (胡俊光)
2025-02-20 10:11     ` Paul-pl Chen (陳柏霖)
2025-01-10 12:34 ` [PATCH 10/12] drm/mediatek: add OUTPROC " paul-pl.chen
2025-01-10 12:34   ` paul-pl.chen
2025-02-12  4:08   ` CK Hu (胡俊光)
2025-02-12  4:08     ` CK Hu (胡俊光)
2025-02-21 11:54     ` Paul-pl Chen (陳柏霖)
2025-02-21 11:54       ` Paul-pl Chen (陳柏霖)
2025-01-10 12:34 ` [PATCH 11/12] drm/mediatek: add ovlsys_adaptor " paul-pl.chen
2025-01-10 12:34   ` paul-pl.chen
2025-02-12  7:09   ` CK Hu (胡俊光)
2025-02-12  7:09     ` CK Hu (胡俊光)
2025-02-21 12:34     ` Paul-pl Chen (陳柏霖)
2025-02-21 12:34       ` Paul-pl Chen (陳柏霖)
2025-01-10 12:34 ` [PATCH 12/12] drm/mediatek: Add support for multiple mmsys in the one mediatek-drm driver paul-pl.chen
2025-01-10 12:34   ` paul-pl.chen
2025-02-12  9:30   ` CK Hu (胡俊光)
2025-02-12  9:30     ` CK Hu (胡俊光)
2025-02-21 12:39     ` Paul-pl Chen (陳柏霖)
2025-02-21 12:39       ` Paul-pl Chen (陳柏霖)
2025-01-13 12:50 ` [PATCH 00/12] Add Mediatek Soc DRM support for mt8196 AngeloGioacchino Del Regno
2025-01-13 12:50   ` AngeloGioacchino Del Regno
2025-01-15  8:05   ` Paul-pl Chen (陳柏霖)
2025-01-15  8:05     ` Paul-pl Chen (陳柏霖)
2025-01-15  8:05     ` Paul-pl Chen (陳柏霖)

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