[PATCH 04/10] net/ixgbe/base: Add PTP by PHY feature for E610

[Yuan Wang <yuanx.wang@intel.com>]

From: Karol Kolacinski <karol.kolacinski@intel.com>

Add "Set PTP by PHY" (0x0634) ACI command.
Add a new PTP by PHY capability (0x0097).
This command allows configuring PTP timestamping on PHY or MAC.

Add 2 PTP by PHY registers:
PROXY_TX_TS (XGMII_SPARE_REG[0])
PROXY_STS (XGMII_SPARE_REG[1])

Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Yuan Wang <yuanx.wang@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_e610.c      | 56 ++++++++++++++++++++++++
 drivers/net/ixgbe/base/ixgbe_e610.h      |  3 ++
 drivers/net/ixgbe/base/ixgbe_type_e610.h | 52 ++++++++++++++++++++++
 3 files changed, 111 insertions(+)

diff --git a/drivers/net/ixgbe/base/ixgbe_e610.c b/drivers/net/ixgbe/base/ixgbe_e610.c
index a7d642887f..5124b18f59 100644
--- a/drivers/net/ixgbe/base/ixgbe_e610.c
+++ b/drivers/net/ixgbe/base/ixgbe_e610.c
@@ -747,6 +747,11 @@ ixgbe_parse_common_caps(struct ixgbe_hw *hw, struct ixgbe_hw_common_caps *caps,
 		DEBUGOUT2("%s: next_cluster_id_support = %d\n",
 			  prefix, caps->next_cluster_id_support);
 		break;
+	case IXGBE_ACI_CAPS_PTP_BY_PHY:
+		caps->ptp_by_phy_support = (number == 1);
+		DEBUGOUT2("%s: ptp_by_phy_support = %d\n", prefix,
+			  caps->ptp_by_phy_support);
+		break;
 	default:
 		/* Not one of the recognized common capabilities */
 		found = false;
@@ -1797,6 +1802,57 @@ s32 ixgbe_configure_lse(struct ixgbe_hw *hw, bool activate, u16 mask)
 	return IXGBE_SUCCESS;
 }
 
+/**
+ * ixgbe_set_ptp_by_phy - Set PTP timestamping by PHY
+ * @hw: pointer to the HW struct
+ * @ptp_request: timestamp mode request
+ * @flags: timestamp mode flags
+ *
+ * Set PTP by PHY using ACI command (0x0634).
+ *
+ * Return: 0 on success, negative error code otherwise
+ */
+s32 ixgbe_set_ptp_by_phy(struct ixgbe_hw *hw, u8 ptp_request, u8 flags)
+{
+	struct ixgbe_aci_cmd_set_ptp_by_phy *cmd;
+	struct ixgbe_aci_desc desc;
+
+	ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_set_ptp_by_phy);
+	cmd = &desc.params.set_ptp_by_phy;
+	cmd->ptp_request = ptp_request;
+	cmd->flags = flags;
+
+	return ixgbe_aci_send_cmd(hw, &desc, NULL, 0);
+}
+
+/**
+ * ixgbe_get_ptp_by_phy - Get PTP timestamping by PHY
+ * @hw: pointer to the HW struct
+ * @ptp_config: timestamp mode config
+ * @flags: timestamp mode flags
+ *
+ * Get PTP by PHY using ACI command (0x0635).
+ *
+ * Return: 0 on success, negative error code otherwise
+ */
+s32 ixgbe_get_ptp_by_phy(struct ixgbe_hw *hw, u8 *ptp_config, u8 *flags)
+{
+	struct ixgbe_aci_cmd_get_ptp_by_phy_resp *resp;
+	struct ixgbe_aci_desc desc;
+	s32 status;
+
+	ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_get_ptp_by_phy);
+	resp = &desc.params.get_ptp_by_phy_resp;
+
+	status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0);
+	if (!status) {
+		*ptp_config = resp->ptp_config;
+		*flags = resp->flags;
+	}
+
+	return status;
+}
+
 /**
  * ixgbe_aci_get_netlist_node - get a node handle
  * @hw: pointer to the hw struct
diff --git a/drivers/net/ixgbe/base/ixgbe_e610.h b/drivers/net/ixgbe/base/ixgbe_e610.h
index 716bb86303..ccf76e3b9b 100644
--- a/drivers/net/ixgbe/base/ixgbe_e610.h
+++ b/drivers/net/ixgbe/base/ixgbe_e610.h
@@ -47,6 +47,9 @@ s32 ixgbe_aci_get_link_info(struct ixgbe_hw *hw, bool ena_lse,
 s32 ixgbe_aci_set_event_mask(struct ixgbe_hw *hw, u8 port_num, u16 mask);
 s32 ixgbe_configure_lse(struct ixgbe_hw *hw, bool activate, u16 mask);
 
+s32 ixgbe_set_ptp_by_phy(struct ixgbe_hw *hw, u8 ptp_request, u8 flags);
+s32 ixgbe_get_ptp_by_phy(struct ixgbe_hw *hw, u8 *ptp_config, u8 *flags);
+
 s32 ixgbe_aci_get_netlist_node(struct ixgbe_hw *hw,
 			       struct ixgbe_aci_cmd_get_link_topo *cmd,
 			       u8 *node_part_number, u16 *node_handle);
diff --git a/drivers/net/ixgbe/base/ixgbe_type_e610.h b/drivers/net/ixgbe/base/ixgbe_type_e610.h
index 4f09fcf3d5..d0c34c8690 100644
--- a/drivers/net/ixgbe/base/ixgbe_type_e610.h
+++ b/drivers/net/ixgbe/base/ixgbe_type_e610.h
@@ -469,6 +469,8 @@ enum ixgbe_aci_opc {
 	ixgbe_aci_opc_restart_an			= 0x0605,
 	ixgbe_aci_opc_get_link_status			= 0x0607,
 	ixgbe_aci_opc_set_event_mask			= 0x0613,
+	ixgbe_aci_opc_set_ptp_by_phy			= 0x0634,
+	ixgbe_aci_opc_get_ptp_by_phy			= 0x0635,
 	ixgbe_aci_opc_get_link_topo			= 0x06E0,
 	ixgbe_aci_opc_get_link_topo_pin			= 0x06E1,
 	ixgbe_aci_opc_read_i2c				= 0x06E2,
@@ -697,6 +699,7 @@ struct ixgbe_aci_cmd_list_caps_elem {
 #define IXGBE_ACI_CAPS_EXT_TOPO_DEV_IMG2		0x0083
 #define IXGBE_ACI_CAPS_EXT_TOPO_DEV_IMG3		0x0084
 #define IXGBE_ACI_CAPS_NEXT_CLUSTER_ID			0x0096
+#define IXGBE_ACI_CAPS_PTP_BY_PHY			0x0097
 	u8 major_ver;
 	u8 minor_ver;
 	/* Number of resources described by this capability */
@@ -1072,6 +1075,45 @@ struct ixgbe_aci_cmd_set_event_mask {
 
 IXGBE_CHECK_PARAM_LEN(ixgbe_aci_cmd_set_event_mask);
 
+/* Set PTP by PHY (direct 0x0634) */
+struct ixgbe_aci_cmd_set_ptp_by_phy {
+	u8 ptp_request;
+#define IXGBE_SET_PTP_BY_PHY_PTP_REQ_DISABLE		0
+#define IXGBE_SET_PTP_BY_PHY_PTP_REQ_ENABLE		1
+#define IXGBE_SET_PTP_BY_PHY_PTP_REQ_TOD_INIT		2
+#define IXGBE_SET_PTP_BY_PHY_PTP_REQ_SET_PHY_PARAMS	3
+	u8 flags;
+#define IXGBE_SET_PTP_BY_PHY_ETHERTYPE_M		GENMASK(4, 0)
+#define IXGBE_SET_PTP_BY_PHY_ETHERTYPE_NO_VLAN_TAG	0x0C
+#define IXGBE_SET_PTP_BY_PHY_ETHERTYPE_VLAN_TAG		0x10
+#define IXGBE_SET_PTP_BY_PHY_TX_TS_M			BIT(5)
+#define IXGBE_SET_PTP_BY_PHY_TX_TS_2STEP		0
+#define IXGBE_SET_PTP_BY_PHY_TX_TS_1STEP		1
+	u8 rsvd[14];
+};
+
+IXGBE_CHECK_PARAM_LEN(ixgbe_aci_cmd_set_ptp_by_phy);
+
+/* Get PTP by PHY response (direct 0x0635) */
+struct ixgbe_aci_cmd_get_ptp_by_phy_resp {
+	u8 ptp_config;
+#define IXGBE_GET_PTP_BY_PHY_PTP_REQ_DISABLE		0
+#define IXGBE_GET_PTP_BY_PHY_PTP_REQ_ENABLE		1
+	u8 flags;
+#define IXGBE_GET_PTP_BY_PHY_ETHERTYPE_M		GENMASK(4, 0)
+#define IXGBE_GET_PTP_BY_PHY_ETHERTYPE_NO_VLAN_TAG	0x0C
+#define IXGBE_GET_PTP_BY_PHY_ETHERTYPE_VLAN_TAG		0x10
+#define IXGBE_GET_PTP_BY_PHY_TX_TS_M			BIT(5)
+#define IXGBE_GET_PTP_BY_PHY_TX_TS_2STEP		0
+#define IXGBE_GET_PTP_BY_PHY_TX_TS_1STEP		1
+	u8 rsvd[6];
+	__le16 maxDriftThreshold;
+	__le16 minDriftThreshold;
+	u8 rsvd2[4];
+};
+
+IXGBE_CHECK_PARAM_LEN(ixgbe_aci_cmd_get_ptp_by_phy_resp);
+
 struct ixgbe_aci_cmd_link_topo_params {
 	u8 lport_num;
 	u8 lport_num_valid;
@@ -1861,6 +1903,8 @@ struct ixgbe_aci_desc {
 		struct ixgbe_aci_cmd_restart_an restart_an;
 		struct ixgbe_aci_cmd_get_link_status get_link_status;
 		struct ixgbe_aci_cmd_set_event_mask set_event_mask;
+		struct ixgbe_aci_cmd_set_ptp_by_phy set_ptp_by_phy;
+		struct ixgbe_aci_cmd_get_ptp_by_phy_resp get_ptp_by_phy_resp;
 		struct ixgbe_aci_cmd_get_link_topo get_link_topo;
 		struct ixgbe_aci_cmd_get_link_topo_pin get_link_topo_pin;
 		struct ixgbe_aci_cmd_i2c read_write_i2c;
@@ -2019,6 +2063,7 @@ struct ixgbe_hw_common_caps {
 	bool ext_topo_dev_img_prog_en[IXGBE_EXT_TOPO_DEV_IMG_COUNT];
 #define IXGBE_EXT_TOPO_DEV_IMG_PROG_EN	BIT(1)
 	bool next_cluster_id_support;
+	bool ptp_by_phy_support;
 };
 
 /* IEEE 1588 TIME_SYNC specific info */
@@ -2205,4 +2250,11 @@ struct ixgbe_nvm_access_data {
 	u32 regval;			/* Storage for register value */
 };
 
+#define PROXY_TX_TS            0x00000100
+#define PROXY_STS              0x00000104
+#define PROXY_STS_SEQ_ID       GENMASK(15, 0)
+#define PROXY_STS_ERR          GENMASK(29, 15)
+#define PROXY_STS_TX_TS_RDY    BIT(30)
+#define PROXY_STS_TX_TS_INT    BIT(31)
+
 #endif /* _IXGBE_TYPE_E610_H_ */
-- 
2.43.5