From: Simon Horman <horms@kernel.org>
To: Przemek Kitszel <przemyslaw.kitszel@intel.com>
Cc: anthony.l.nguyen@intel.com, piotr.kwapulinski@intel.com,
andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com,
kuba@kernel.org, pabeni@redhat.com,
michal.swiatkowski@linux.intel.com,
intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org,
Dheeraj Reddy Jonnalagadda <dheeraj.linuxdev@gmail.com>
Subject: Re: [Intel-wired-lan] [PATCH v2 net-next] ixgbe: Fix endian handling for ACI descriptor registers
Date: Fri, 17 Jan 2025 18:09:44 +0000 [thread overview]
Message-ID: <20250117180944.GS6206@kernel.org> (raw)
In-Reply-To: <fe142f22-caff-4cab-9f6f-56d55e63f210@intel.com>
On Fri, Jan 17, 2025 at 11:01:22AM +0100, Przemek Kitszel wrote:
> On 1/16/25 17:21, Simon Horman wrote:
> > On Wed, Jan 15, 2025 at 09:11:17AM +0530, Dheeraj Reddy Jonnalagadda wrote:
> > > The ixgbe driver was missing proper endian conversion for ACI descriptor
> > > register operations. Add the necessary conversions when reading and
> > > writing to the registers.
> > >
> > > Fixes: 46761fd52a88 ("ixgbe: Add support for E610 FW Admin Command Interface")
> > > Closes: https://scan7.scan.coverity.com/#/project-view/52337/11354?selectedIssue=1602757
> > > Signed-off-by: Dheeraj Reddy Jonnalagadda <dheeraj.linuxdev@gmail.com>
> >
> > Hi Dheeraj,
> >
> > It seems that Sparse is not very happy about __le32 values appearing
> > where u32 ones are expected. I wonder if something like what is below
> > (compile tested only!) would both address the problem at hand and
> > keep Sparse happy (even if negting much of it's usefulness by using casts).
> >
> > diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h
> > index 6639069ad528..8b3787837128 100644
> > --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h
> > +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h
> > @@ -150,6 +150,9 @@ static inline void ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 value)
> > }
> > #define IXGBE_WRITE_REG(a, reg, value) ixgbe_write_reg((a), (reg), (value))
>
> Simon,
>
> As all ixgbe registers are LE, it would be beneficial to change
> ixgbe_write_reg(), as @value should be __le32, (perhaps @reg too).
> Similar for 64b.
Understood, sounds good to me.
> This clearly would not be a "fix" material, as all call sites should be
> examined to check if they conform.
Sure, that also seems reasonable.
But do you also think a more minimal fix is in order?
>
> > +#define IXGBE_WRITE_REG_LE32(a, reg, value) \
> > + ixgbe_write_reg((a), (reg), (u32 __force)cpu_to_le32(value))
> > +
>
WARNING: multiple messages have this Message-ID (diff)
From: Simon Horman <horms@kernel.org>
To: Przemek Kitszel <przemyslaw.kitszel@intel.com>
Cc: anthony.l.nguyen@intel.com, piotr.kwapulinski@intel.com,
andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com,
kuba@kernel.org, pabeni@redhat.com,
michal.swiatkowski@linux.intel.com,
intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org,
Dheeraj Reddy Jonnalagadda <dheeraj.linuxdev@gmail.com>
Subject: Re: [PATCH v2 net-next] ixgbe: Fix endian handling for ACI descriptor registers
Date: Fri, 17 Jan 2025 18:09:44 +0000 [thread overview]
Message-ID: <20250117180944.GS6206@kernel.org> (raw)
In-Reply-To: <fe142f22-caff-4cab-9f6f-56d55e63f210@intel.com>
On Fri, Jan 17, 2025 at 11:01:22AM +0100, Przemek Kitszel wrote:
> On 1/16/25 17:21, Simon Horman wrote:
> > On Wed, Jan 15, 2025 at 09:11:17AM +0530, Dheeraj Reddy Jonnalagadda wrote:
> > > The ixgbe driver was missing proper endian conversion for ACI descriptor
> > > register operations. Add the necessary conversions when reading and
> > > writing to the registers.
> > >
> > > Fixes: 46761fd52a88 ("ixgbe: Add support for E610 FW Admin Command Interface")
> > > Closes: https://scan7.scan.coverity.com/#/project-view/52337/11354?selectedIssue=1602757
> > > Signed-off-by: Dheeraj Reddy Jonnalagadda <dheeraj.linuxdev@gmail.com>
> >
> > Hi Dheeraj,
> >
> > It seems that Sparse is not very happy about __le32 values appearing
> > where u32 ones are expected. I wonder if something like what is below
> > (compile tested only!) would both address the problem at hand and
> > keep Sparse happy (even if negting much of it's usefulness by using casts).
> >
> > diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h
> > index 6639069ad528..8b3787837128 100644
> > --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h
> > +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h
> > @@ -150,6 +150,9 @@ static inline void ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 value)
> > }
> > #define IXGBE_WRITE_REG(a, reg, value) ixgbe_write_reg((a), (reg), (value))
>
> Simon,
>
> As all ixgbe registers are LE, it would be beneficial to change
> ixgbe_write_reg(), as @value should be __le32, (perhaps @reg too).
> Similar for 64b.
Understood, sounds good to me.
> This clearly would not be a "fix" material, as all call sites should be
> examined to check if they conform.
Sure, that also seems reasonable.
But do you also think a more minimal fix is in order?
>
> > +#define IXGBE_WRITE_REG_LE32(a, reg, value) \
> > + ixgbe_write_reg((a), (reg), (u32 __force)cpu_to_le32(value))
> > +
>
next prev parent reply other threads:[~2025-01-17 18:09 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-15 3:41 [Intel-wired-lan] [PATCH v2 net-next] ixgbe: Fix endian handling for ACI descriptor registers Dheeraj Reddy Jonnalagadda
2025-01-15 3:41 ` Dheeraj Reddy Jonnalagadda
2025-01-15 5:55 ` [Intel-wired-lan] " Michal Swiatkowski
2025-01-15 5:55 ` Michal Swiatkowski
2025-01-15 11:39 ` [Intel-wired-lan] " Kwapulinski, Piotr
2025-01-15 11:39 ` Kwapulinski, Piotr
2025-01-16 16:21 ` [Intel-wired-lan] " Simon Horman
2025-01-16 16:21 ` Simon Horman
2025-01-17 10:01 ` [Intel-wired-lan] " Przemek Kitszel
2025-01-17 10:01 ` Przemek Kitszel
2025-01-17 18:09 ` Simon Horman [this message]
2025-01-17 18:09 ` Simon Horman
2025-01-20 14:48 ` [Intel-wired-lan] " Przemek Kitszel
2025-01-20 14:48 ` Przemek Kitszel
2025-01-21 13:50 ` [Intel-wired-lan] " Dheeraj Reddy Jonnalagadda
2025-01-21 13:50 ` Dheeraj Reddy Jonnalagadda
2025-01-27 11:30 ` [Intel-wired-lan] " Przemek Kitszel
2025-01-27 11:30 ` Przemek Kitszel
2025-01-18 15:05 ` [Intel-wired-lan] " kernel test robot
2025-01-18 15:05 ` kernel test robot
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