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From: "Jouni Högander" <jouni.hogander@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: animesh.manna@intel.com, ville.syrjala@intel.com,
	"Jouni Högander" <jouni.hogander@intel.com>
Subject: [PATCH v6 06/12] drm/i915/psr: Allow writing PSR2_MAN_TRK_CTL using DSB
Date: Mon, 27 Jan 2025 12:28:40 +0200	[thread overview]
Message-ID: <20250127102846.1237560-7-jouni.hogander@intel.com> (raw)
In-Reply-To: <20250127102846.1237560-1-jouni.hogander@intel.com>

Allow writing PSR2_MAN_TRK_CTL using DSB by using intel_de_write_dsb. Do
not check intel_dp->psr.lock being held when using DSB. This assertion
doesn't make sense as in case of using DSB the actual write happens later
and we are not taking intel_dp->psr.lock mutex over dsb commit.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c |  2 +-
 drivers/gpu/drm/i915/display/intel_psr.c     | 16 ++++++++++------
 drivers/gpu/drm/i915/display/intel_psr.h     |  4 +++-
 3 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 7d68d652c1bc9..aed35f203fd8d 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7143,7 +7143,7 @@ static void commit_pipe_pre_planes(struct intel_atomic_state *state,
 			intel_pipe_fastset(old_crtc_state, new_crtc_state);
 	}
 
-	intel_psr2_program_trans_man_trk_ctl(new_crtc_state);
+	intel_psr2_program_trans_man_trk_ctl(NULL, new_crtc_state);
 
 	intel_atomic_update_watermarks(state, crtc);
 }
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index f486fccdf2310..c6712312a04d4 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2344,7 +2344,8 @@ static void intel_psr_force_update(struct intel_dp *intel_dp)
 	intel_de_write(display, CURSURFLIVE(display, intel_dp->psr.pipe), 0);
 }
 
-void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_state)
+void intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb,
+					  const struct intel_crtc_state *crtc_state)
 {
 	struct intel_display *display = to_intel_display(crtc_state);
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
@@ -2358,20 +2359,23 @@ void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_st
 					     crtc_state->uapi.encoder_mask) {
 		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 
-		lockdep_assert_held(&intel_dp->psr.lock);
+		if (!dsb)
+			lockdep_assert_held(&intel_dp->psr.lock);
+
 		if (DISPLAY_VER(display) < 20 && intel_dp->psr.psr2_sel_fetch_cff_enabled)
 			return;
 		break;
 	}
 
-	intel_de_write(display, PSR2_MAN_TRK_CTL(display, cpu_transcoder),
-		       crtc_state->psr2_man_track_ctl);
+	intel_de_write_dsb(display, dsb,
+			   PSR2_MAN_TRK_CTL(display, cpu_transcoder),
+			   crtc_state->psr2_man_track_ctl);
 
 	if (!crtc_state->enable_psr2_su_region_et)
 		return;
 
-	intel_de_write(display, PIPE_SRCSZ_ERLY_TPT(crtc->pipe),
-		       crtc_state->pipe_srcsz_early_tpt);
+	intel_de_write_dsb(display, dsb, PIPE_SRCSZ_ERLY_TPT(crtc->pipe),
+			   crtc_state->pipe_srcsz_early_tpt);
 }
 
 static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state,
diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h
index 5f1671d02d765..e6eba6633a92b 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.h
+++ b/drivers/gpu/drm/i915/display/intel_psr.h
@@ -17,6 +17,7 @@ struct intel_crtc;
 struct intel_crtc_state;
 struct intel_display;
 struct intel_dp;
+struct intel_dsb;
 struct intel_encoder;
 struct intel_plane;
 struct intel_plane_state;
@@ -54,7 +55,8 @@ void intel_psr_wait_for_idle_locked(const struct intel_crtc_state *new_crtc_stat
 bool intel_psr_enabled(struct intel_dp *intel_dp);
 int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
 				struct intel_crtc *crtc);
-void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_state);
+void intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb,
+					  const struct intel_crtc_state *crtc_state);
 void intel_psr_pause(struct intel_dp *intel_dp);
 void intel_psr_resume(struct intel_dp *intel_dp);
 bool intel_psr_needs_block_dc_vblank(const struct intel_crtc_state *crtc_state);
-- 
2.43.0


  parent reply	other threads:[~2025-01-27 10:29 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-27 10:28 [PATCH v6 00/12] PSR DSB support Jouni Högander
2025-01-27 10:28 ` [PATCH v6 01/12] drm/i915/psr: Use PSR2_MAN_TRK_CTL CFF bit only to send full update Jouni Högander
2025-01-27 10:28 ` [PATCH v6 02/12] drm/i915/psr: Rename psr_force_hw_tracking_exit as intel_psr_force_update Jouni Högander
2025-01-27 10:28 ` [PATCH v6 03/12] drm/i915/psr: Split setting sff and cff bits away from intel_psr_force_update Jouni Högander
2025-01-27 10:28 ` [PATCH v6 04/12] drm/i915/psr: Add register definitions for SFF_CTL and CFF_CTL registers Jouni Högander
2025-01-27 10:28 ` [PATCH v6 05/12] drm/i915/psr: Use SFF_CTL on invalidate/flush for LunarLake onwards Jouni Högander
2025-01-27 10:28 ` Jouni Högander [this message]
2025-01-27 10:28 ` [PATCH v6 07/12] drm/i915/psr: Changes for PSR2_MAN_TRK_CTL handling when DSB is in use Jouni Högander
2025-02-10 16:26   ` Ville Syrjälä
2025-02-11  6:24     ` Hogander, Jouni
2025-02-11 20:10       ` Ville Syrjälä
2025-01-27 10:28 ` [PATCH v6 08/12] drm/i915/psr: Remove DSB_SKIP_WAITS_EN chicken bit Jouni Högander
2025-02-10 16:28   ` Ville Syrjälä
2025-01-27 10:28 ` [PATCH v6 09/12] drm/i915/display: Evade scanline 0 as well if PSR1 or PSR2 is enabled Jouni Högander
2025-02-10 16:29   ` Ville Syrjälä
2025-01-27 10:28 ` [PATCH v6 10/12] drm/i915/psr: Add function for triggering "Frame Change" event Jouni Högander
2025-02-10 16:34   ` Ville Syrjälä
2025-01-27 10:28 ` [PATCH v6 11/12] drm/i915/display: Ensure we have "Frame Change" event in DSB commit Jouni Högander
2025-02-10 16:34   ` Ville Syrjälä
2025-01-27 10:28 ` [PATCH v6 12/12] drm/i915/psr: Allow DSB usage when PSR is enabled Jouni Högander
2025-01-27 11:24 ` ✓ CI.Patch_applied: success for PSR DSB support (rev6) Patchwork
2025-01-27 11:25 ` ✓ CI.checkpatch: " Patchwork
2025-01-27 11:26 ` ✓ CI.KUnit: " Patchwork
2025-01-27 11:41 ` ✗ Fi.CI.SPARSE: warning for PSR DSB support (rev7) Patchwork
2025-01-27 11:42 ` ✓ CI.Build: success for PSR DSB support (rev6) Patchwork
2025-01-27 11:44 ` ✓ CI.Hooks: " Patchwork
2025-01-27 11:46 ` ✗ CI.checksparse: warning " Patchwork
2025-01-27 11:58 ` ✗ i915.CI.BAT: failure for PSR DSB support (rev7) Patchwork
2025-01-27 12:05 ` ✓ Xe.CI.BAT: success for PSR DSB support (rev6) Patchwork
2025-01-27 13:29 ` ✗ Xe.CI.Full: failure " Patchwork
2025-01-28 15:28 ` ✗ Fi.CI.SPARSE: warning for PSR DSB support (rev8) Patchwork
2025-01-28 15:49 ` ✓ i915.CI.BAT: success " Patchwork
2025-01-29  7:24 ` ✗ i915.CI.Full: failure " Patchwork

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