* Re: [PATCH] arm64: dts: Introduce more nodes to EN7581 SoC evaluation board
@ 2025-02-01 17:18 kernel test robot
0 siblings, 0 replies; 10+ messages in thread
From: kernel test robot @ 2025-02-01 17:18 UTC (permalink / raw)
To: oe-kbuild; +Cc: lkp
::::::
:::::: Manual check reason: "dtcheck: binding changes may go via different trees"
::::::
BCC: lkp@intel.com
CC: llvm@lists.linux.dev
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20250201-en7581-dts-spi-pinctrl-v1-1-aaa4a9dfc4a6@kernel.org>
References: <20250201-en7581-dts-spi-pinctrl-v1-1-aaa4a9dfc4a6@kernel.org>
TO: Lorenzo Bianconi <lorenzo@kernel.org>
TO: Matthias Brugger <matthias.bgg@gmail.com>
TO: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
TO: Rob Herring <robh@kernel.org>
TO: Krzysztof Kozlowski <krzk@kernel.org>
TO: Conor Dooley <conor+dt@kernel.org>
CC: linux-arm-kernel@lists.infradead.org
CC: linux-mediatek@lists.infradead.org
CC: devicetree@vger.kernel.org
CC: Lorenzo Bianconi <lorenzo@kernel.org>
Hi Lorenzo,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 7605336e9d136c14c94482ce7385de783f2f748e]
url: https://github.com/intel-lab-lkp/linux/commits/Lorenzo-Bianconi/arm64-dts-Introduce-more-nodes-to-EN7581-SoC-evaluation-board/20250201-224326
base: 7605336e9d136c14c94482ce7385de783f2f748e
patch link: https://lore.kernel.org/r/20250201-en7581-dts-spi-pinctrl-v1-1-aaa4a9dfc4a6%40kernel.org
patch subject: [PATCH] arm64: dts: Introduce more nodes to EN7581 SoC evaluation board
:::::: branch date: 2 hours ago
:::::: commit date: 2 hours ago
config: arm64-randconfig-002-20250201 (https://download.01.org/0day-ci/archive/20250202/202502020107.pfsv4sal-lkp@intel.com/config)
compiler: clang version 16.0.6 (https://github.com/llvm/llvm-project 7cbf1a2591520c2491aa35339f227775f4d3adf6)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250202/202502020107.pfsv4sal-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/r/202502020107.pfsv4sal-lkp@intel.com/
dtcheck warnings: (new ones prefixed by >>)
>> arch/arm64/boot/dts/airoha/en7581.dtsi:186.24-192.5: Warning (unit_address_vs_reg): /soc/i2cclock@0: node has a unit name, but no reg or ranges property
arch/arm64/boot/dts/airoha/en7581.dtsi:155.37-160.5: Warning (simple_bus_reg): /soc/clock-controller@1fa20000: simple-bus unit address format error, expected "1fb00000"
>> arch/arm64/boot/dts/airoha/en7581.dtsi:186.24-192.5: Warning (simple_bus_reg): /soc/i2cclock@0: missing or empty reg/ranges property
vim +186 arch/arm64/boot/dts/airoha/en7581.dtsi
ab52c59103002b Daniel Danzberger 2024-03-09 6
ab52c59103002b Daniel Danzberger 2024-03-09 7 / {
ab52c59103002b Daniel Danzberger 2024-03-09 8 interrupt-parent = <&gic>;
ab52c59103002b Daniel Danzberger 2024-03-09 9 #address-cells = <2>;
ab52c59103002b Daniel Danzberger 2024-03-09 10 #size-cells = <2>;
ab52c59103002b Daniel Danzberger 2024-03-09 11
ab52c59103002b Daniel Danzberger 2024-03-09 12 reserved-memory {
ab52c59103002b Daniel Danzberger 2024-03-09 13 #address-cells = <2>;
ab52c59103002b Daniel Danzberger 2024-03-09 14 #size-cells = <2>;
ab52c59103002b Daniel Danzberger 2024-03-09 15 ranges;
ab52c59103002b Daniel Danzberger 2024-03-09 16
ab52c59103002b Daniel Danzberger 2024-03-09 17 npu-binary@84000000 {
ab52c59103002b Daniel Danzberger 2024-03-09 18 no-map;
ab52c59103002b Daniel Danzberger 2024-03-09 19 reg = <0x0 0x84000000 0x0 0xa00000>;
ab52c59103002b Daniel Danzberger 2024-03-09 20 };
ab52c59103002b Daniel Danzberger 2024-03-09 21
ab52c59103002b Daniel Danzberger 2024-03-09 22 npu-flag@84b0000 {
ab52c59103002b Daniel Danzberger 2024-03-09 23 no-map;
ab52c59103002b Daniel Danzberger 2024-03-09 24 reg = <0x0 0x84b00000 0x0 0x100000>;
ab52c59103002b Daniel Danzberger 2024-03-09 25 };
ab52c59103002b Daniel Danzberger 2024-03-09 26
ab52c59103002b Daniel Danzberger 2024-03-09 27 npu-pkt@85000000 {
ab52c59103002b Daniel Danzberger 2024-03-09 28 no-map;
ab52c59103002b Daniel Danzberger 2024-03-09 29 reg = <0x0 0x85000000 0x0 0x1a00000>;
ab52c59103002b Daniel Danzberger 2024-03-09 30 };
ab52c59103002b Daniel Danzberger 2024-03-09 31
ab52c59103002b Daniel Danzberger 2024-03-09 32 npu-phyaddr@86b00000 {
ab52c59103002b Daniel Danzberger 2024-03-09 33 no-map;
ab52c59103002b Daniel Danzberger 2024-03-09 34 reg = <0x0 0x86b00000 0x0 0x100000>;
ab52c59103002b Daniel Danzberger 2024-03-09 35 };
ab52c59103002b Daniel Danzberger 2024-03-09 36
ab52c59103002b Daniel Danzberger 2024-03-09 37 npu-rxdesc@86d00000 {
ab52c59103002b Daniel Danzberger 2024-03-09 38 no-map;
ab52c59103002b Daniel Danzberger 2024-03-09 39 reg = <0x0 0x86d00000 0x0 0x100000>;
ab52c59103002b Daniel Danzberger 2024-03-09 40 };
ab52c59103002b Daniel Danzberger 2024-03-09 41 };
ab52c59103002b Daniel Danzberger 2024-03-09 42
ab52c59103002b Daniel Danzberger 2024-03-09 43 psci {
ab52c59103002b Daniel Danzberger 2024-03-09 44 compatible = "arm,psci-1.0";
ab52c59103002b Daniel Danzberger 2024-03-09 45 method = "smc";
ab52c59103002b Daniel Danzberger 2024-03-09 46 };
ab52c59103002b Daniel Danzberger 2024-03-09 47
ab52c59103002b Daniel Danzberger 2024-03-09 48 cpus {
ab52c59103002b Daniel Danzberger 2024-03-09 49 #address-cells = <1>;
ab52c59103002b Daniel Danzberger 2024-03-09 50 #size-cells = <0>;
ab52c59103002b Daniel Danzberger 2024-03-09 51
ab52c59103002b Daniel Danzberger 2024-03-09 52 cpu-map {
ab52c59103002b Daniel Danzberger 2024-03-09 53 cluster0 {
ab52c59103002b Daniel Danzberger 2024-03-09 54 core0 {
ab52c59103002b Daniel Danzberger 2024-03-09 55 cpu = <&cpu0>;
ab52c59103002b Daniel Danzberger 2024-03-09 56 };
ab52c59103002b Daniel Danzberger 2024-03-09 57
ab52c59103002b Daniel Danzberger 2024-03-09 58 core1 {
ab52c59103002b Daniel Danzberger 2024-03-09 59 cpu = <&cpu1>;
ab52c59103002b Daniel Danzberger 2024-03-09 60 };
ab52c59103002b Daniel Danzberger 2024-03-09 61
ab52c59103002b Daniel Danzberger 2024-03-09 62 core2 {
ab52c59103002b Daniel Danzberger 2024-03-09 63 cpu = <&cpu2>;
ab52c59103002b Daniel Danzberger 2024-03-09 64 };
ab52c59103002b Daniel Danzberger 2024-03-09 65
ab52c59103002b Daniel Danzberger 2024-03-09 66 core3 {
ab52c59103002b Daniel Danzberger 2024-03-09 67 cpu = <&cpu3>;
ab52c59103002b Daniel Danzberger 2024-03-09 68 };
ab52c59103002b Daniel Danzberger 2024-03-09 69 };
ab52c59103002b Daniel Danzberger 2024-03-09 70 };
ab52c59103002b Daniel Danzberger 2024-03-09 71
ab52c59103002b Daniel Danzberger 2024-03-09 72 cpu0: cpu@0 {
ab52c59103002b Daniel Danzberger 2024-03-09 73 device_type = "cpu";
ab52c59103002b Daniel Danzberger 2024-03-09 74 compatible = "arm,cortex-a53";
ab52c59103002b Daniel Danzberger 2024-03-09 75 reg = <0x0>;
ab52c59103002b Daniel Danzberger 2024-03-09 76 enable-method = "psci";
ab52c59103002b Daniel Danzberger 2024-03-09 77 clock-frequency = <80000000>;
ab52c59103002b Daniel Danzberger 2024-03-09 78 next-level-cache = <&l2>;
ab52c59103002b Daniel Danzberger 2024-03-09 79 };
ab52c59103002b Daniel Danzberger 2024-03-09 80
ab52c59103002b Daniel Danzberger 2024-03-09 81 cpu1: cpu@1 {
ab52c59103002b Daniel Danzberger 2024-03-09 82 device_type = "cpu";
ab52c59103002b Daniel Danzberger 2024-03-09 83 compatible = "arm,cortex-a53";
ab52c59103002b Daniel Danzberger 2024-03-09 84 reg = <0x1>;
ab52c59103002b Daniel Danzberger 2024-03-09 85 enable-method = "psci";
ab52c59103002b Daniel Danzberger 2024-03-09 86 clock-frequency = <80000000>;
ab52c59103002b Daniel Danzberger 2024-03-09 87 next-level-cache = <&l2>;
ab52c59103002b Daniel Danzberger 2024-03-09 88 };
ab52c59103002b Daniel Danzberger 2024-03-09 89
ab52c59103002b Daniel Danzberger 2024-03-09 90 cpu2: cpu@2 {
ab52c59103002b Daniel Danzberger 2024-03-09 91 device_type = "cpu";
ab52c59103002b Daniel Danzberger 2024-03-09 92 compatible = "arm,cortex-a53";
ab52c59103002b Daniel Danzberger 2024-03-09 93 reg = <0x2>;
ab52c59103002b Daniel Danzberger 2024-03-09 94 enable-method = "psci";
ab52c59103002b Daniel Danzberger 2024-03-09 95 clock-frequency = <80000000>;
ab52c59103002b Daniel Danzberger 2024-03-09 96 next-level-cache = <&l2>;
ab52c59103002b Daniel Danzberger 2024-03-09 97 };
ab52c59103002b Daniel Danzberger 2024-03-09 98
ab52c59103002b Daniel Danzberger 2024-03-09 99 cpu3: cpu@3 {
ab52c59103002b Daniel Danzberger 2024-03-09 100 device_type = "cpu";
ab52c59103002b Daniel Danzberger 2024-03-09 101 compatible = "arm,cortex-a53";
ab52c59103002b Daniel Danzberger 2024-03-09 102 reg = <0x3>;
ab52c59103002b Daniel Danzberger 2024-03-09 103 enable-method = "psci";
ab52c59103002b Daniel Danzberger 2024-03-09 104 clock-frequency = <80000000>;
ab52c59103002b Daniel Danzberger 2024-03-09 105 next-level-cache = <&l2>;
ab52c59103002b Daniel Danzberger 2024-03-09 106 };
ab52c59103002b Daniel Danzberger 2024-03-09 107
ab52c59103002b Daniel Danzberger 2024-03-09 108 l2: l2-cache {
ab52c59103002b Daniel Danzberger 2024-03-09 109 compatible = "cache";
ab52c59103002b Daniel Danzberger 2024-03-09 110 cache-size = <0x80000>;
ab52c59103002b Daniel Danzberger 2024-03-09 111 cache-line-size = <64>;
ab52c59103002b Daniel Danzberger 2024-03-09 112 cache-level = <2>;
ab52c59103002b Daniel Danzberger 2024-03-09 113 cache-unified;
ab52c59103002b Daniel Danzberger 2024-03-09 114 };
ab52c59103002b Daniel Danzberger 2024-03-09 115 };
ab52c59103002b Daniel Danzberger 2024-03-09 116
ab52c59103002b Daniel Danzberger 2024-03-09 117 timer {
ab52c59103002b Daniel Danzberger 2024-03-09 118 compatible = "arm,armv8-timer";
ab52c59103002b Daniel Danzberger 2024-03-09 119 interrupt-parent = <&gic>;
ab52c59103002b Daniel Danzberger 2024-03-09 120 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
ab52c59103002b Daniel Danzberger 2024-03-09 121 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
ab52c59103002b Daniel Danzberger 2024-03-09 122 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
ab52c59103002b Daniel Danzberger 2024-03-09 123 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
ab52c59103002b Daniel Danzberger 2024-03-09 124 };
ab52c59103002b Daniel Danzberger 2024-03-09 125
ab52c59103002b Daniel Danzberger 2024-03-09 126 soc {
ab52c59103002b Daniel Danzberger 2024-03-09 127 compatible = "simple-bus";
ab52c59103002b Daniel Danzberger 2024-03-09 128 #address-cells = <2>;
ab52c59103002b Daniel Danzberger 2024-03-09 129 #size-cells = <2>;
ab52c59103002b Daniel Danzberger 2024-03-09 130 ranges;
ab52c59103002b Daniel Danzberger 2024-03-09 131
ab52c59103002b Daniel Danzberger 2024-03-09 132 gic: interrupt-controller@9000000 {
ab52c59103002b Daniel Danzberger 2024-03-09 133 compatible = "arm,gic-v3";
ab52c59103002b Daniel Danzberger 2024-03-09 134 interrupt-controller;
ab52c59103002b Daniel Danzberger 2024-03-09 135 #interrupt-cells = <3>;
ab52c59103002b Daniel Danzberger 2024-03-09 136 #address-cells = <1>;
ab52c59103002b Daniel Danzberger 2024-03-09 137 #size-cells = <1>;
ab52c59103002b Daniel Danzberger 2024-03-09 138 reg = <0x0 0x09000000 0x0 0x20000>,
ab52c59103002b Daniel Danzberger 2024-03-09 139 <0x0 0x09080000 0x0 0x80000>,
ab52c59103002b Daniel Danzberger 2024-03-09 140 <0x0 0x09400000 0x0 0x2000>,
ab52c59103002b Daniel Danzberger 2024-03-09 141 <0x0 0x09500000 0x0 0x2000>,
ab52c59103002b Daniel Danzberger 2024-03-09 142 <0x0 0x09600000 0x0 0x20000>;
ab52c59103002b Daniel Danzberger 2024-03-09 143 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
ab52c59103002b Daniel Danzberger 2024-03-09 144 };
ab52c59103002b Daniel Danzberger 2024-03-09 145
ab52c59103002b Daniel Danzberger 2024-03-09 146 uart1: serial@1fbf0000 {
ab52c59103002b Daniel Danzberger 2024-03-09 147 compatible = "ns16550";
ab52c59103002b Daniel Danzberger 2024-03-09 148 reg = <0x0 0x1fbf0000 0x0 0x30>;
ab52c59103002b Daniel Danzberger 2024-03-09 149 reg-io-width = <4>;
ab52c59103002b Daniel Danzberger 2024-03-09 150 reg-shift = <2>;
ab52c59103002b Daniel Danzberger 2024-03-09 151 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
ab52c59103002b Daniel Danzberger 2024-03-09 152 clock-frequency = <1843200>;
ab52c59103002b Daniel Danzberger 2024-03-09 153 };
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 154
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 155 scuclk: clock-controller@1fa20000 {
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 156 compatible = "airoha,en7581-scu";
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 157 reg = <0x0 0x1fb00000 0x0 0x970>;
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 158 #clock-cells = <1>;
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 159 #reset-cells = <1>;
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 160 };
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 161
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 162 rng@1faa1000 {
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 163 compatible = "airoha,en7581-trng";
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 164 reg = <0x0 0x1faa1000 0x0 0xc04>;
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 165 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 166 };
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 167
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 168 system-controller@1fbf0200 {
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 169 compatible = "syscon", "simple-mfd";
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 170 reg = <0x0 0x1fbf0200 0x0 0xc0>;
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 171
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 172 en7581_pinctrl: pinctrl {
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 173 compatible = "airoha,en7581-pinctrl";
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 174
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 175 interrupt-parent = <&gic>;
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 176 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 177
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 178 gpio-controller;
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 179 #gpio-cells = <2>;
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 180
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 181 interrupt-controller;
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 182 #interrupt-cells = <2>;
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 183 };
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 184 };
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 185
89ddabb2e68a00 Lorenzo Bianconi 2025-02-01 @186 i2cclock: i2cclock@0 {
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH] arm64: dts: Introduce more nodes to EN7581 SoC evaluation board
@ 2025-02-02 6:12 kernel test robot
0 siblings, 0 replies; 10+ messages in thread
From: kernel test robot @ 2025-02-02 6:12 UTC (permalink / raw)
To: oe-kbuild; +Cc: lkp
::::::
:::::: Manual check reason: "dtcheck: binding changes may go via different trees"
::::::
BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20250201-en7581-dts-spi-pinctrl-v1-1-aaa4a9dfc4a6@kernel.org>
References: <20250201-en7581-dts-spi-pinctrl-v1-1-aaa4a9dfc4a6@kernel.org>
TO: Lorenzo Bianconi <lorenzo@kernel.org>
TO: Matthias Brugger <matthias.bgg@gmail.com>
TO: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
TO: Rob Herring <robh@kernel.org>
TO: Krzysztof Kozlowski <krzk@kernel.org>
TO: Conor Dooley <conor+dt@kernel.org>
CC: linux-arm-kernel@lists.infradead.org
CC: linux-mediatek@lists.infradead.org
CC: devicetree@vger.kernel.org
CC: Lorenzo Bianconi <lorenzo@kernel.org>
Hi Lorenzo,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 7605336e9d136c14c94482ce7385de783f2f748e]
url: https://github.com/intel-lab-lkp/linux/commits/Lorenzo-Bianconi/arm64-dts-Introduce-more-nodes-to-EN7581-SoC-evaluation-board/20250201-224326
base: 7605336e9d136c14c94482ce7385de783f2f748e
patch link: https://lore.kernel.org/r/20250201-en7581-dts-spi-pinctrl-v1-1-aaa4a9dfc4a6%40kernel.org
patch subject: [PATCH] arm64: dts: Introduce more nodes to EN7581 SoC evaluation board
:::::: branch date: 15 hours ago
:::::: commit date: 15 hours ago
config: arm64-randconfig-051-20250202 (https://download.01.org/0day-ci/archive/20250202/202502021344.O3LDzsdz-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 14.2.0
dtschema version: 2024.12.dev6+gc4da38d
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250202/202502021344.O3LDzsdz-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/r/202502021344.O3LDzsdz-lkp@intel.com/
dtcheck warnings: (new ones prefixed by >>)
arch/arm64/boot/dts/airoha/en7581.dtsi:186.24-192.5: Warning (unit_address_vs_reg): /soc/i2cclock@0: node has a unit name, but no reg or ranges property
arch/arm64/boot/dts/airoha/en7581.dtsi:155.37-160.5: Warning (simple_bus_reg): /soc/clock-controller@1fa20000: simple-bus unit address format error, expected "1fb00000"
arch/arm64/boot/dts/airoha/en7581.dtsi:186.24-192.5: Warning (simple_bus_reg): /soc/i2cclock@0: missing or empty reg/ranges property
>> arch/arm64/boot/dts/airoha/en7581-evb.dtb: soc: i2cclock@0: 'anyOf' conditional failed, one must be fixed:
'reg' is a required property
'ranges' is a required property
from schema $id: http://devicetree.org/schemas/simple-bus.yaml#
>> arch/arm64/boot/dts/airoha/en7581-evb.dtb: system-controller@1fbf0200: compatible: ['syscon', 'simple-mfd'] is too short
from schema $id: http://devicetree.org/schemas/mfd/syscon-common.yaml#
>> arch/arm64/boot/dts/airoha/en7581-evb.dtb: i2cclock@0: clock-frequency: 20000000 is greater than the maximum of 5000000
from schema $id: http://devicetree.org/schemas/i2c/i2c-controller.yaml#
>> arch/arm64/boot/dts/airoha/en7581-evb.dtb: i2c0@1fbf8000: 'resets' is a required property
from schema $id: http://devicetree.org/schemas/i2c/mediatek,mt7621-i2c.yaml#
>> arch/arm64/boot/dts/airoha/en7581-evb.dtb: i2c1@1fbf8100: 'resets' is a required property
from schema $id: http://devicetree.org/schemas/i2c/mediatek,mt7621-i2c.yaml#
>> arch/arm64/boot/dts/airoha/en7581-evb.dtb: i2c1@1fbf8100: status: 'oneOf' conditional failed, one must be fixed:
['disable'] is not of type 'object'
'disable' is not one of ['okay', 'disabled', 'reserved', 'fail', 'fail-needs-probe']
from schema $id: http://devicetree.org/schemas/dt-core.yaml#
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH] arm64: dts: Introduce more nodes to EN7581 SoC evaluation board
@ 2025-02-01 14:39 Lorenzo Bianconi
2025-02-03 15:37 ` Rob Herring (Arm)
` (2 more replies)
0 siblings, 3 replies; 10+ messages in thread
From: Lorenzo Bianconi @ 2025-02-01 14:39 UTC (permalink / raw)
To: Matthias Brugger, AngeloGioacchino Del Regno, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, linux-mediatek, devicetree, Lorenzo Bianconi
Add the following nodes to EN7581 SoC and EN7581 evaluation board:
- clock controller
- rng controller
- pinctrl
- i2c controllers
- spi nand controller
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
---
arch/arm64/boot/dts/airoha/en7581-evb.dts | 8 +++
arch/arm64/boot/dts/airoha/en7581.dtsi | 90 +++++++++++++++++++++++++++++++
2 files changed, 98 insertions(+)
diff --git a/arch/arm64/boot/dts/airoha/en7581-evb.dts b/arch/arm64/boot/dts/airoha/en7581-evb.dts
index cf58e43dd5b21dbf4f64e305a4b4a2daee100858..1126da4b795f5d5df9725ec4d75cd9353b011710 100644
--- a/arch/arm64/boot/dts/airoha/en7581-evb.dts
+++ b/arch/arm64/boot/dts/airoha/en7581-evb.dts
@@ -24,3 +24,11 @@ memory@80000000 {
reg = <0x0 0x80000000 0x2 0x00000000>;
};
};
+
+&i2c0 {
+ status = "okay";
+};
+
+&snfi {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/airoha/en7581.dtsi b/arch/arm64/boot/dts/airoha/en7581.dtsi
index 55eb1762fb11364877695960f5a2d3e42caf8611..b1cf650efd78c6c20d19e7f18c204cf5862215c0 100644
--- a/arch/arm64/boot/dts/airoha/en7581.dtsi
+++ b/arch/arm64/boot/dts/airoha/en7581.dtsi
@@ -2,6 +2,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/en7523-clk.h>
/ {
interrupt-parent = <&gic>;
@@ -150,5 +151,94 @@ uart1: serial@1fbf0000 {
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <1843200>;
};
+
+ scuclk: clock-controller@1fa20000 {
+ compatible = "airoha,en7581-scu";
+ reg = <0x0 0x1fb00000 0x0 0x970>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ rng@1faa1000 {
+ compatible = "airoha,en7581-trng";
+ reg = <0x0 0x1faa1000 0x0 0xc04>;
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ system-controller@1fbf0200 {
+ compatible = "syscon", "simple-mfd";
+ reg = <0x0 0x1fbf0200 0x0 0xc0>;
+
+ en7581_pinctrl: pinctrl {
+ compatible = "airoha,en7581-pinctrl";
+
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ i2cclock: i2cclock@0 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+
+ /* 20 MHz */
+ clock-frequency = <20000000>;
+ };
+
+ i2c0: i2c0@1fbf8000 {
+ compatible = "mediatek,mt7621-i2c";
+ reg = <0x0 0x1fbf8000 0x0 0x100>;
+
+ clocks = <&i2cclock>;
+
+ /* 100 kHz */
+ clock-frequency = <100000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disable";
+ };
+
+ i2c1: i2c1@1fbf8100 {
+ compatible = "mediatek,mt7621-i2c";
+ reg = <0x0 0x1fbf8100 0x0 0x100>;
+
+ clocks = <&i2cclock>;
+
+ /* 100 kHz */
+ clock-frequency = <100000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disable";
+ };
+
+ snfi: spi@1fa10000 {
+ compatible = "airoha,en7581-snand";
+ reg = <0x0 0x1fa10000 0x0 0x140>,
+ <0x0 0x1fa11000 0x0 0x160>;
+
+ clocks = <&scuclk EN7523_CLK_SPI>;
+ clock-names = "spi";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+
+ spi_nand: nand@0 {
+ compatible = "spi-nand";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <2>;
+ };
+ };
};
};
---
base-commit: 7605336e9d136c14c94482ce7385de783f2f748e
change-id: 20250201-en7581-dts-spi-pinctrl-4160b825ca9d
Best regards,
--
Lorenzo Bianconi <lorenzo@kernel.org>
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH] arm64: dts: Introduce more nodes to EN7581 SoC evaluation board
2025-02-01 14:39 Lorenzo Bianconi
@ 2025-02-03 15:37 ` Rob Herring (Arm)
2025-02-03 16:04 ` Krzysztof Kozlowski
2025-02-03 18:41 ` Rob Herring
2 siblings, 0 replies; 10+ messages in thread
From: Rob Herring (Arm) @ 2025-02-03 15:37 UTC (permalink / raw)
To: Lorenzo Bianconi
Cc: Conor Dooley, linux-mediatek, Krzysztof Kozlowski,
AngeloGioacchino Del Regno, Matthias Brugger, linux-arm-kernel,
devicetree
On Sat, 01 Feb 2025 15:39:48 +0100, Lorenzo Bianconi wrote:
> Add the following nodes to EN7581 SoC and EN7581 evaluation board:
> - clock controller
> - rng controller
> - pinctrl
> - i2c controllers
> - spi nand controller
>
> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
> ---
> arch/arm64/boot/dts/airoha/en7581-evb.dts | 8 +++
> arch/arm64/boot/dts/airoha/en7581.dtsi | 90 +++++++++++++++++++++++++++++++
> 2 files changed, 98 insertions(+)
>
My bot found new DTB warnings on the .dts files added or changed in this
series.
Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.
If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:
pip3 install dtschema --upgrade
New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/airoha/' for 20250201-en7581-dts-spi-pinctrl-v1-1-aaa4a9dfc4a6@kernel.org:
arch/arm64/boot/dts/airoha/en7581-evb.dtb: soc: i2cclock@0: 'anyOf' conditional failed, one must be fixed:
'reg' is a required property
'ranges' is a required property
from schema $id: http://devicetree.org/schemas/simple-bus.yaml#
arch/arm64/boot/dts/airoha/en7581-evb.dtb: system-controller@1fbf0200: compatible: ['syscon', 'simple-mfd'] is too short
from schema $id: http://devicetree.org/schemas/mfd/syscon-common.yaml#
arch/arm64/boot/dts/airoha/en7581-evb.dtb: i2cclock@0: clock-frequency: 20000000 is greater than the maximum of 5000000
from schema $id: http://devicetree.org/schemas/i2c/i2c-controller.yaml#
arch/arm64/boot/dts/airoha/en7581-evb.dtb: i2c0@1fbf8000: 'resets' is a required property
from schema $id: http://devicetree.org/schemas/i2c/mediatek,mt7621-i2c.yaml#
arch/arm64/boot/dts/airoha/en7581-evb.dtb: i2c1@1fbf8100: 'resets' is a required property
from schema $id: http://devicetree.org/schemas/i2c/mediatek,mt7621-i2c.yaml#
arch/arm64/boot/dts/airoha/en7581-evb.dtb: i2c1@1fbf8100: status: 'oneOf' conditional failed, one must be fixed:
['disable'] is not of type 'object'
'disable' is not one of ['okay', 'disabled', 'reserved', 'fail', 'fail-needs-probe']
from schema $id: http://devicetree.org/schemas/dt-core.yaml#
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] arm64: dts: Introduce more nodes to EN7581 SoC evaluation board
2025-02-01 14:39 Lorenzo Bianconi
2025-02-03 15:37 ` Rob Herring (Arm)
@ 2025-02-03 16:04 ` Krzysztof Kozlowski
2025-02-03 16:06 ` Krzysztof Kozlowski
2025-02-03 18:41 ` Rob Herring
2 siblings, 1 reply; 10+ messages in thread
From: Krzysztof Kozlowski @ 2025-02-03 16:04 UTC (permalink / raw)
To: Lorenzo Bianconi, Matthias Brugger, AngeloGioacchino Del Regno,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, linux-mediatek, devicetree
On 01/02/2025 15:39, Lorenzo Bianconi wrote:
> Add the following nodes to EN7581 SoC and EN7581 evaluation board:
> - clock controller
> - rng controller
> - pinctrl
> - i2c controllers
> - spi nand controller
>
> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
> ---
Please use subject prefixes matching the subsystem. You can get them for
example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory
your patch is touching. For bindings, the preferred subjects are
explained here:
https://www.kernel.org/doc/html/latest/devicetree/bindings/submitting-patches.html#i-for-patch-submitters
Missing prefix for vendor.
> arch/arm64/boot/dts/airoha/en7581-evb.dts | 8 +++
> arch/arm64/boot/dts/airoha/en7581.dtsi | 90 +++++++++++++++++++++++++++++++
> 2 files changed, 98 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/airoha/en7581-evb.dts b/arch/arm64/boot/dts/airoha/en7581-evb.dts
> index cf58e43dd5b21dbf4f64e305a4b4a2daee100858..1126da4b795f5d5df9725ec4d75cd9353b011710 100644
> --- a/arch/arm64/boot/dts/airoha/en7581-evb.dts
> +++ b/arch/arm64/boot/dts/airoha/en7581-evb.dts
> @@ -24,3 +24,11 @@ memory@80000000 {
> reg = <0x0 0x80000000 0x2 0x00000000>;
> };
> };
> +
> +&i2c0 {
> + status = "okay";
> +};
> +
> +&snfi {
> + status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/airoha/en7581.dtsi b/arch/arm64/boot/dts/airoha/en7581.dtsi
> index 55eb1762fb11364877695960f5a2d3e42caf8611..b1cf650efd78c6c20d19e7f18c204cf5862215c0 100644
> --- a/arch/arm64/boot/dts/airoha/en7581.dtsi
> +++ b/arch/arm64/boot/dts/airoha/en7581.dtsi
> @@ -2,6 +2,7 @@
>
> #include <dt-bindings/interrupt-controller/irq.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/clock/en7523-clk.h>
>
> / {
> interrupt-parent = <&gic>;
> @@ -150,5 +151,94 @@ uart1: serial@1fbf0000 {
> interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
> clock-frequency = <1843200>;
> };
> +
> + scuclk: clock-controller@1fa20000 {
> + compatible = "airoha,en7581-scu";
> + reg = <0x0 0x1fb00000 0x0 0x970>;
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + };
> +
> + rng@1faa1000 {
> + compatible = "airoha,en7581-trng";
> + reg = <0x0 0x1faa1000 0x0 0xc04>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + system-controller@1fbf0200 {
> + compatible = "syscon", "simple-mfd";
These are never allowed alone. I am pretty sure I added proper checks
which should point it out, so I think you did not really test your DTS.
It does not look like you tested the DTS against bindings. Please run
`make dtbs_check W=1` (see
Documentation/devicetree/bindings/writing-schema.rst or
https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
for instructions).
Maybe you need to update your dtschema and yamllint. Don't rely on
distro packages for dtschema and be sure you are using the latest
released dtschema.
> + reg = <0x0 0x1fbf0200 0x0 0xc0>;
> +
> + en7581_pinctrl: pinctrl {
> + compatible = "airoha,en7581-pinctrl";
> +
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
> + i2cclock: i2cclock@0 {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> +
> + /* 20 MHz */
> + clock-frequency = <20000000>;
> + };
> +
> + i2c0: i2c0@1fbf8000 {
Node names should be generic. See also an explanation and list of
examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
i2c@
> + compatible = "mediatek,mt7621-i2c";
> + reg = <0x0 0x1fbf8000 0x0 0x100>;
> +
> + clocks = <&i2cclock>;
> +
> + /* 100 kHz */
> + clock-frequency = <100000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + status = "disable";
> + };
> +
> + i2c1: i2c1@1fbf8100 {
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH] arm64: dts: Introduce more nodes to EN7581 SoC evaluation board
2025-02-03 16:04 ` Krzysztof Kozlowski
@ 2025-02-03 16:06 ` Krzysztof Kozlowski
2025-02-04 16:15 ` Lorenzo Bianconi
0 siblings, 1 reply; 10+ messages in thread
From: Krzysztof Kozlowski @ 2025-02-03 16:06 UTC (permalink / raw)
To: Lorenzo Bianconi, Matthias Brugger, AngeloGioacchino Del Regno,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, linux-mediatek, devicetree
On 03/02/2025 17:04, Krzysztof Kozlowski wrote:
>> +
>> + rng@1faa1000 {
>> + compatible = "airoha,en7581-trng";
>> + reg = <0x0 0x1faa1000 0x0 0xc04>;
>> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
>> + };
>> +
>> + system-controller@1fbf0200 {
>> + compatible = "syscon", "simple-mfd";
>
> These are never allowed alone. I am pretty sure I added proper checks
> which should point it out, so I think you did not really test your DTS.
>
> It does not look like you tested the DTS against bindings. Please run
> `make dtbs_check W=1` (see
> Documentation/devicetree/bindings/writing-schema.rst or
> https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
> for instructions).
> Maybe you need to update your dtschema and yamllint. Don't rely on
> distro packages for dtschema and be sure you are using the latest
> released dtschema.
>
Now I see Rob's report:
arch/arm64/boot/dts/airoha/en7581-evb.dtb: system-controller@1fbf0200:
compatible: ['syscon', 'simple-mfd'] is too short
which confirms untested code. Schema is there for a reason. :(
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH] arm64: dts: Introduce more nodes to EN7581 SoC evaluation board
2025-02-03 16:06 ` Krzysztof Kozlowski
@ 2025-02-04 16:15 ` Lorenzo Bianconi
2025-02-05 7:34 ` Krzysztof Kozlowski
0 siblings, 1 reply; 10+ messages in thread
From: Lorenzo Bianconi @ 2025-02-04 16:15 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Matthias Brugger, AngeloGioacchino Del Regno, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel,
linux-mediatek, devicetree
[-- Attachment #1: Type: text/plain, Size: 1499 bytes --]
> On 03/02/2025 17:04, Krzysztof Kozlowski wrote:
> >> +
> >> + rng@1faa1000 {
> >> + compatible = "airoha,en7581-trng";
> >> + reg = <0x0 0x1faa1000 0x0 0xc04>;
> >> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> >> + };
> >> +
> >> + system-controller@1fbf0200 {
> >> + compatible = "syscon", "simple-mfd";
> >
> > These are never allowed alone. I am pretty sure I added proper checks
> > which should point it out, so I think you did not really test your DTS.
> >
> > It does not look like you tested the DTS against bindings. Please run
> > `make dtbs_check W=1` (see
> > Documentation/devicetree/bindings/writing-schema.rst or
> > https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
> > for instructions).
> > Maybe you need to update your dtschema and yamllint. Don't rely on
> > distro packages for dtschema and be sure you are using the latest
> > released dtschema.
> >
>
> Now I see Rob's report:
> arch/arm64/boot/dts/airoha/en7581-evb.dtb: system-controller@1fbf0200:
> compatible: ['syscon', 'simple-mfd'] is too short
> which confirms untested code. Schema is there for a reason. :(
actually I have tested them with the following command (but without W=1).
make CHECK_DTBS=y DT_SCHEMA_FILES=airoha airoha/en7581-evb.dtb
- dtschema 2024.11
- yamllint 1.35.1
With W=1 I can see more issues, I will fix issues in v2.
Regards,
Lorenzo
>
> Best regards,
> Krzysztof
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^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH] arm64: dts: Introduce more nodes to EN7581 SoC evaluation board
2025-02-04 16:15 ` Lorenzo Bianconi
@ 2025-02-05 7:34 ` Krzysztof Kozlowski
2025-02-05 8:22 ` Lorenzo Bianconi
0 siblings, 1 reply; 10+ messages in thread
From: Krzysztof Kozlowski @ 2025-02-05 7:34 UTC (permalink / raw)
To: Lorenzo Bianconi
Cc: Matthias Brugger, AngeloGioacchino Del Regno, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel,
linux-mediatek, devicetree
On 04/02/2025 17:15, Lorenzo Bianconi wrote:
>> On 03/02/2025 17:04, Krzysztof Kozlowski wrote:
>>>> +
>>>> + rng@1faa1000 {
>>>> + compatible = "airoha,en7581-trng";
>>>> + reg = <0x0 0x1faa1000 0x0 0xc04>;
>>>> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
>>>> + };
>>>> +
>>>> + system-controller@1fbf0200 {
>>>> + compatible = "syscon", "simple-mfd";
>>>
>>> These are never allowed alone. I am pretty sure I added proper checks
>>> which should point it out, so I think you did not really test your DTS.
>>>
>>> It does not look like you tested the DTS against bindings. Please run
>>> `make dtbs_check W=1` (see
>>> Documentation/devicetree/bindings/writing-schema.rst or
>>> https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
>>> for instructions).
>>> Maybe you need to update your dtschema and yamllint. Don't rely on
>>> distro packages for dtschema and be sure you are using the latest
>>> released dtschema.
>>>
>>
>> Now I see Rob's report:
>> arch/arm64/boot/dts/airoha/en7581-evb.dtb: system-controller@1fbf0200:
>> compatible: ['syscon', 'simple-mfd'] is too short
>> which confirms untested code. Schema is there for a reason. :(
>
> actually I have tested them with the following command (but without W=1).
>
> make CHECK_DTBS=y DT_SCHEMA_FILES=airoha airoha/en7581-evb.dtb
>
> - dtschema 2024.11
> - yamllint 1.35.1
>
> With W=1 I can see more issues, I will fix issues in v2.
Rob's warning does not come from W=1. Your test cmd was incorrect: drop
DT_SCHEMA_FILES. You must test your code against ENTIRE bindings, not
some subset.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH] arm64: dts: Introduce more nodes to EN7581 SoC evaluation board
2025-02-05 7:34 ` Krzysztof Kozlowski
@ 2025-02-05 8:22 ` Lorenzo Bianconi
0 siblings, 0 replies; 10+ messages in thread
From: Lorenzo Bianconi @ 2025-02-05 8:22 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Matthias Brugger, AngeloGioacchino Del Regno, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel,
linux-mediatek, devicetree
[-- Attachment #1: Type: text/plain, Size: 1844 bytes --]
> On 04/02/2025 17:15, Lorenzo Bianconi wrote:
> >> On 03/02/2025 17:04, Krzysztof Kozlowski wrote:
> >>>> +
> >>>> + rng@1faa1000 {
> >>>> + compatible = "airoha,en7581-trng";
> >>>> + reg = <0x0 0x1faa1000 0x0 0xc04>;
> >>>> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> >>>> + };
> >>>> +
> >>>> + system-controller@1fbf0200 {
> >>>> + compatible = "syscon", "simple-mfd";
> >>>
> >>> These are never allowed alone. I am pretty sure I added proper checks
> >>> which should point it out, so I think you did not really test your DTS.
> >>>
> >>> It does not look like you tested the DTS against bindings. Please run
> >>> `make dtbs_check W=1` (see
> >>> Documentation/devicetree/bindings/writing-schema.rst or
> >>> https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
> >>> for instructions).
> >>> Maybe you need to update your dtschema and yamllint. Don't rely on
> >>> distro packages for dtschema and be sure you are using the latest
> >>> released dtschema.
> >>>
> >>
> >> Now I see Rob's report:
> >> arch/arm64/boot/dts/airoha/en7581-evb.dtb: system-controller@1fbf0200:
> >> compatible: ['syscon', 'simple-mfd'] is too short
> >> which confirms untested code. Schema is there for a reason. :(
> >
> > actually I have tested them with the following command (but without W=1).
> >
> > make CHECK_DTBS=y DT_SCHEMA_FILES=airoha airoha/en7581-evb.dtb
> >
> > - dtschema 2024.11
> > - yamllint 1.35.1
> >
> > With W=1 I can see more issues, I will fix issues in v2.
>
> Rob's warning does not come from W=1. Your test cmd was incorrect: drop
> DT_SCHEMA_FILES. You must test your code against ENTIRE bindings, not
> some subset.
ack, thx for pointing this out.
Regards,
Lorenzo
>
> Best regards,
> Krzysztof
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] arm64: dts: Introduce more nodes to EN7581 SoC evaluation board
2025-02-01 14:39 Lorenzo Bianconi
2025-02-03 15:37 ` Rob Herring (Arm)
2025-02-03 16:04 ` Krzysztof Kozlowski
@ 2025-02-03 18:41 ` Rob Herring
2 siblings, 0 replies; 10+ messages in thread
From: Rob Herring @ 2025-02-03 18:41 UTC (permalink / raw)
To: Lorenzo Bianconi
Cc: Matthias Brugger, AngeloGioacchino Del Regno, Krzysztof Kozlowski,
Conor Dooley, linux-arm-kernel, linux-mediatek, devicetree
On Sat, Feb 1, 2025 at 8:40 AM Lorenzo Bianconi <lorenzo@kernel.org> wrote:
>
> Add the following nodes to EN7581 SoC and EN7581 evaluation board:
> - clock controller
> - rng controller
> - pinctrl
> - i2c controllers
> - spi nand controller
>
> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
> ---
> arch/arm64/boot/dts/airoha/en7581-evb.dts | 8 +++
> arch/arm64/boot/dts/airoha/en7581.dtsi | 90 +++++++++++++++++++++++++++++++
> 2 files changed, 98 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/airoha/en7581-evb.dts b/arch/arm64/boot/dts/airoha/en7581-evb.dts
> index cf58e43dd5b21dbf4f64e305a4b4a2daee100858..1126da4b795f5d5df9725ec4d75cd9353b011710 100644
> --- a/arch/arm64/boot/dts/airoha/en7581-evb.dts
> +++ b/arch/arm64/boot/dts/airoha/en7581-evb.dts
> @@ -24,3 +24,11 @@ memory@80000000 {
> reg = <0x0 0x80000000 0x2 0x00000000>;
> };
> };
> +
> +&i2c0 {
> + status = "okay";
> +};
> +
> +&snfi {
> + status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/airoha/en7581.dtsi b/arch/arm64/boot/dts/airoha/en7581.dtsi
> index 55eb1762fb11364877695960f5a2d3e42caf8611..b1cf650efd78c6c20d19e7f18c204cf5862215c0 100644
> --- a/arch/arm64/boot/dts/airoha/en7581.dtsi
> +++ b/arch/arm64/boot/dts/airoha/en7581.dtsi
> @@ -2,6 +2,7 @@
>
> #include <dt-bindings/interrupt-controller/irq.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/clock/en7523-clk.h>
>
> / {
> interrupt-parent = <&gic>;
> @@ -150,5 +151,94 @@ uart1: serial@1fbf0000 {
> interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
> clock-frequency = <1843200>;
> };
> +
> + scuclk: clock-controller@1fa20000 {
> + compatible = "airoha,en7581-scu";
> + reg = <0x0 0x1fb00000 0x0 0x970>;
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + };
> +
> + rng@1faa1000 {
> + compatible = "airoha,en7581-trng";
> + reg = <0x0 0x1faa1000 0x0 0xc04>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + system-controller@1fbf0200 {
> + compatible = "syscon", "simple-mfd";
> + reg = <0x0 0x1fbf0200 0x0 0xc0>;
> +
> + en7581_pinctrl: pinctrl {
> + compatible = "airoha,en7581-pinctrl";
> +
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
> + i2cclock: i2cclock@0 {
clock-20000000 for node name.
A unit-address without 'reg' is not valid. Test this with W=1.
Rob
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2025-02-05 8:23 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
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2025-02-01 17:18 [PATCH] arm64: dts: Introduce more nodes to EN7581 SoC evaluation board kernel test robot
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2025-02-02 6:12 kernel test robot
2025-02-01 14:39 Lorenzo Bianconi
2025-02-03 15:37 ` Rob Herring (Arm)
2025-02-03 16:04 ` Krzysztof Kozlowski
2025-02-03 16:06 ` Krzysztof Kozlowski
2025-02-04 16:15 ` Lorenzo Bianconi
2025-02-05 7:34 ` Krzysztof Kozlowski
2025-02-05 8:22 ` Lorenzo Bianconi
2025-02-03 18:41 ` Rob Herring
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