* [PATCH v1 1/1] aspeed/soc: Support Non-maskable Interrupt for AST2700
@ 2025-02-04 6:09 ` Jamin Lin via
0 siblings, 0 replies; 5+ messages in thread
From: Jamin Lin via @ 2025-02-04 6:09 UTC (permalink / raw)
To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Andrew Jeffery, Joel Stanley, open list:ASPEED BMCs,
open list:All patches CC here
Cc: jamin_lin, troy_lee, yunlin.tang
QEMU supports GICv3 Non-maskable Interrupt, adds to support Non-maskable
Interrupt for AST2700.
Reference:
https://github.com/qemu/qemu/commit/b36a32ead
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/arm/aspeed_ast27x0.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index 4114e15ddd..361a054d46 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -470,6 +470,10 @@ static bool aspeed_soc_ast2700_gic_realize(DeviceState *dev, Error **errp)
qdev_get_gpio_in(cpudev, ARM_CPU_VIRQ));
sysbus_connect_irq(gicbusdev, i + 3 * sc->num_cpus,
qdev_get_gpio_in(cpudev, ARM_CPU_VFIQ));
+ sysbus_connect_irq(gicbusdev, i + 4 * sc->num_cpus,
+ qdev_get_gpio_in(cpudev, ARM_CPU_NMI));
+ sysbus_connect_irq(gicbusdev, i + 5 * sc->num_cpus,
+ qdev_get_gpio_in(cpudev, ARM_CPU_VINMI));
}
return true;
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH v1 1/1] aspeed/soc: Support Non-maskable Interrupt for AST2700
2025-02-04 6:09 ` Jamin Lin via
(?)
@ 2025-02-04 6:41 ` Cédric Le Goater
-1 siblings, 0 replies; 5+ messages in thread
From: Cédric Le Goater @ 2025-02-04 6:41 UTC (permalink / raw)
To: Jamin Lin, Peter Maydell, Steven Lee, Troy Lee, Andrew Jeffery,
Joel Stanley, open list:ASPEED BMCs,
open list:All patches CC here, Philippe Mathieu-Daudé
Cc: troy_lee, yunlin.tang
+ Philippe
On 2/4/25 07:09, Jamin Lin wrote:
> QEMU supports GICv3 Non-maskable Interrupt, adds to support Non-maskable
> Interrupt for AST2700.
>
> Reference:
> https://github.com/qemu/qemu/commit/b36a32ead
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
> hw/arm/aspeed_ast27x0.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
> index 4114e15ddd..361a054d46 100644
> --- a/hw/arm/aspeed_ast27x0.c
> +++ b/hw/arm/aspeed_ast27x0.c
> @@ -470,6 +470,10 @@ static bool aspeed_soc_ast2700_gic_realize(DeviceState *dev, Error **errp)
> qdev_get_gpio_in(cpudev, ARM_CPU_VIRQ));
> sysbus_connect_irq(gicbusdev, i + 3 * sc->num_cpus,
> qdev_get_gpio_in(cpudev, ARM_CPU_VFIQ));
> + sysbus_connect_irq(gicbusdev, i + 4 * sc->num_cpus,
> + qdev_get_gpio_in(cpudev, ARM_CPU_NMI));
> + sysbus_connect_irq(gicbusdev, i + 5 * sc->num_cpus,
> + qdev_get_gpio_in(cpudev, ARM_CPU_VINMI));
> }
>
> return true;
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v1 1/1] aspeed/soc: Support Non-maskable Interrupt for AST2700
2025-02-04 6:09 ` Jamin Lin via
(?)
(?)
@ 2025-02-04 21:38 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 5+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-02-04 21:38 UTC (permalink / raw)
To: Jamin Lin, Cédric Le Goater, Peter Maydell, Steven Lee,
Troy Lee, Andrew Jeffery, Joel Stanley, open list:ASPEED BMCs,
open list:All patches CC here
Cc: troy_lee, yunlin.tang
On 4/2/25 07:09, Jamin Lin via wrote:
> QEMU supports GICv3 Non-maskable Interrupt, adds to support Non-maskable
> Interrupt for AST2700.
>
> Reference:
> https://github.com/qemu/qemu/commit/b36a32ead
>
Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> hw/arm/aspeed_ast27x0.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
> index 4114e15ddd..361a054d46 100644
> --- a/hw/arm/aspeed_ast27x0.c
> +++ b/hw/arm/aspeed_ast27x0.c
> @@ -470,6 +470,10 @@ static bool aspeed_soc_ast2700_gic_realize(DeviceState *dev, Error **errp)
> qdev_get_gpio_in(cpudev, ARM_CPU_VIRQ));
> sysbus_connect_irq(gicbusdev, i + 3 * sc->num_cpus,
> qdev_get_gpio_in(cpudev, ARM_CPU_VFIQ));
> + sysbus_connect_irq(gicbusdev, i + 4 * sc->num_cpus,
> + qdev_get_gpio_in(cpudev, ARM_CPU_NMI));
> + sysbus_connect_irq(gicbusdev, i + 5 * sc->num_cpus,
> + qdev_get_gpio_in(cpudev, ARM_CPU_VINMI));
> }
Thank you!
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v1 1/1] aspeed/soc: Support Non-maskable Interrupt for AST2700
2025-02-04 6:09 ` Jamin Lin via
` (2 preceding siblings ...)
(?)
@ 2025-02-05 7:30 ` Cédric Le Goater
-1 siblings, 0 replies; 5+ messages in thread
From: Cédric Le Goater @ 2025-02-05 7:30 UTC (permalink / raw)
To: Jamin Lin, Peter Maydell, Steven Lee, Troy Lee, Andrew Jeffery,
Joel Stanley, open list:ASPEED BMCs,
open list:All patches CC here
Cc: troy_lee, yunlin.tang
On 2/4/25 07:09, Jamin Lin wrote:
> QEMU supports GICv3 Non-maskable Interrupt, adds to support Non-maskable
> Interrupt for AST2700.
>
> Reference:
> https://github.com/qemu/qemu/commit/b36a32ead
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Applied to aspeed-next.
Thanks,
C.
> ---
> hw/arm/aspeed_ast27x0.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
> index 4114e15ddd..361a054d46 100644
> --- a/hw/arm/aspeed_ast27x0.c
> +++ b/hw/arm/aspeed_ast27x0.c
> @@ -470,6 +470,10 @@ static bool aspeed_soc_ast2700_gic_realize(DeviceState *dev, Error **errp)
> qdev_get_gpio_in(cpudev, ARM_CPU_VIRQ));
> sysbus_connect_irq(gicbusdev, i + 3 * sc->num_cpus,
> qdev_get_gpio_in(cpudev, ARM_CPU_VFIQ));
> + sysbus_connect_irq(gicbusdev, i + 4 * sc->num_cpus,
> + qdev_get_gpio_in(cpudev, ARM_CPU_NMI));
> + sysbus_connect_irq(gicbusdev, i + 5 * sc->num_cpus,
> + qdev_get_gpio_in(cpudev, ARM_CPU_VINMI));
> }
>
> return true;
^ permalink raw reply [flat|nested] 5+ messages in thread