[zen:6.13/invlpgb-v9 6/13] arch/x86/include/asm/invlpgb.h:30:9: error: inconsistent operand constraints in an 'asm'

[zen:6.13/invlpgb-v9 6/13] arch/x86/include/asm/invlpgb.h:30:9: error: inconsistent operand constraints in an 'asm'

[kernel test robot]

tree:   https://github.com/zen-kernel/zen-kernel 6.13/invlpgb-v9
head:   df542b65e9753dea56b584fdca48cb8f8e3f74cd
commit: b2ac10f4b65686ca371571bd150c18ea71c7277c [6/13] x86/mm: use INVLPGB for kernel TLB flushes
config: i386-buildonly-randconfig-001-20250208 (https://download.01.org/0day-ci/archive/20250209/202502090041.5ogh6vb1-lkp@intel.com/config)
compiler: gcc-11 (Debian 11.3.0-12) 11.3.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250209/202502090041.5ogh6vb1-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202502090041.5ogh6vb1-lkp@intel.com/

All errors (new ones prefixed by >>):

   In file included from arch/x86/include/asm/tlbflush.h:13,
                    from arch/x86/include/asm/uaccess.h:17,
                    from include/linux/uaccess.h:12,
                    from include/linux/sched/task.h:13,
                    from include/linux/sched/signal.h:9,
                    from include/linux/rcuwait.h:6,
                    from include/linux/percpu-rwsem.h:7,
                    from include/linux/fs.h:33,
                    from include/linux/huge_mm.h:7,
                    from include/linux/mm.h:1133,
                    from arch/x86/mm/tlb.c:4:
   arch/x86/mm/tlb.c: In function 'flush_tlb_kernel_range':
>> arch/x86/include/asm/invlpgb.h:30:9: error: inconsistent operand constraints in an 'asm'
      30 |         asm volatile(".byte 0x0f, 0x01, 0xfe" : : "a" (rax), "c" (ecx), "d" (edx));
         |         ^~~
>> arch/x86/include/asm/invlpgb.h:30:9: error: inconsistent operand constraints in an 'asm'
      30 |         asm volatile(".byte 0x0f, 0x01, 0xfe" : : "a" (rax), "c" (ecx), "d" (edx));
         |         ^~~

Kconfig warnings: (for reference only)
   WARNING: unmet direct dependencies detected for X86_BROADCAST_TLB_FLUSH
   Depends on [n]: CPU_SUP_AMD [=y] && 64BIT [=n]
   Selected by [y]:
   - CPU_SUP_AMD [=y]


vim +/asm +30 arch/x86/include/asm/invlpgb.h

83464118a5db5f Rik van Riel 2025-02-05   8  
83464118a5db5f Rik van Riel 2025-02-05   9  /*
83464118a5db5f Rik van Riel 2025-02-05  10   * INVLPGB does broadcast TLB invalidation across all the CPUs in the system.
83464118a5db5f Rik van Riel 2025-02-05  11   *
83464118a5db5f Rik van Riel 2025-02-05  12   * The INVLPGB instruction is weakly ordered, and a batch of invalidations can
83464118a5db5f Rik van Riel 2025-02-05  13   * be done in a parallel fashion.
83464118a5db5f Rik van Riel 2025-02-05  14   *
83464118a5db5f Rik van Riel 2025-02-05  15   * TLBSYNC is used to ensure that pending INVLPGB invalidations initiated from
83464118a5db5f Rik van Riel 2025-02-05  16   * this CPU have completed.
83464118a5db5f Rik van Riel 2025-02-05  17   */
83464118a5db5f Rik van Riel 2025-02-05  18  static inline void __invlpgb(unsigned long asid, unsigned long pcid,
83464118a5db5f Rik van Riel 2025-02-05  19  			     unsigned long addr, u16 extra_count,
83464118a5db5f Rik van Riel 2025-02-05  20  			     bool pmd_stride, u8 flags)
83464118a5db5f Rik van Riel 2025-02-05  21  {
83464118a5db5f Rik van Riel 2025-02-05  22  	u32 edx = (pcid << 16) | asid;
83464118a5db5f Rik van Riel 2025-02-05  23  	u32 ecx = (pmd_stride << 31) | extra_count;
83464118a5db5f Rik van Riel 2025-02-05  24  	u64 rax = addr | flags;
83464118a5db5f Rik van Riel 2025-02-05  25  
83464118a5db5f Rik van Riel 2025-02-05  26  	/* The low bits in rax are for flags. Verify addr is clean. */
83464118a5db5f Rik van Riel 2025-02-05  27  	VM_WARN_ON_ONCE(addr & ~PAGE_MASK);
83464118a5db5f Rik van Riel 2025-02-05  28  
83464118a5db5f Rik van Riel 2025-02-05  29  	/* INVLPGB; supported in binutils >= 2.36. */
83464118a5db5f Rik van Riel 2025-02-05 @30  	asm volatile(".byte 0x0f, 0x01, 0xfe" : : "a" (rax), "c" (ecx), "d" (edx));
83464118a5db5f Rik van Riel 2025-02-05  31  }
83464118a5db5f Rik van Riel 2025-02-05  32  

:::::: The code at line 30 was first introduced by commit
:::::: 83464118a5db5f7faeadcfac9a09205147c0c604 x86/mm: add INVLPGB support code

:::::: TO: Rik van Riel <riel@surriel.com>
:::::: CC: Steven Barrett <steven@liquorix.net>

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