[PATCH RFC 2/6] ASoC: meson: audin: add audio input dt-bindings

[Valerio Setti <vsetti@baylibre.com>]

Add the dt-bindings and documentation of the AUDIN audio controller.
This component provides most audio input found on the Amlogic GXBB SoC
family.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
---
 .../bindings/sound/amlogic,audin.yaml         | 104 ++++++++++++++++++
 include/dt-bindings/sound/meson-audin.h       |  10 ++
 2 files changed, 114 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/sound/amlogic,audin.yaml
 create mode 100644 include/dt-bindings/sound/meson-audin.h

diff --git a/Documentation/devicetree/bindings/sound/amlogic,audin.yaml b/Documentation/devicetree/bindings/sound/amlogic,audin.yaml
new file mode 100644
index 000000000000..7fb231a8d5a7
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/amlogic,audin.yaml
@@ -0,0 +1,104 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/amlogic,audin.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic AUDIN audio output controller
+
+maintainers:
+	- Valerio Setti <vsetti@baylibre.com>
+
+allOf:
+	- $ref: dai-common.yaml#
+
+properties:
+	$nodename:
+		pattern: "^audio-input-controller@.*"
+
+	"#sound-dai-cells":
+		const: 1
+
+	compatible:
+		items:
+			- enum:
+					- amlogic,audin-gxbb
+			- const: amlogic,audin
+
+	clocks:
+		items:
+      - description: AIU peripheral clock
+      - description: I2S peripheral clock
+      - description: I2S output clock
+      - description: I2S master clock
+      - description: I2S mixer clock
+			- description: AUDIN peripheral clock
+			- description: I2S bit clock gate
+			- description: I2S bit clock basic divider
+			- description: I2S bit clock more divider
+			- description: I2S L/R clock divider
+
+	clock-names:
+		items:
+			- const: pclk
+			- const: i2s_pclk
+			- const: i2s_aoclk
+			- const: i2s_mclk
+			- const: i2s_mixer
+			- const: i2s_input_clk
+			- const: i2s_aoclk_div_gate
+			- const: i2s_aoclk_basic_div
+			- const: i2s_aoclk_more_div
+			- const: i2s_lrclk_div
+
+	reg:
+		maxItems: 1
+
+	resets:
+		maxItems: 1
+
+	sound-name-prefix: true
+
+required:
+	- "#sound-dai-cells"
+	- compatible
+	- clocks
+	- clock-names
+	- reg
+	- resets
+
+additionalProperties: false
+
+examples:
+	- |
+		#include <dt-bindings/clock/gxbb-clkc.h>
+		#include <dt-bindings/sound/meson-gxbb.h>
+		#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
+
+		audin: audio-input-controller@a000 {
+			compatible = "amlogic,audin-gxbb", "amlogic,audin";
+			#sound-dai-cells = <1>;
+			sound-name-prefix = "AUDIN";
+			reg = <0x0 0xa000 0x0 0x308>;
+			clocks = <&clkc CLKID_AIU_GLUE>,
+							 <&clkc CLKID_I2S_OUT>,
+							 <&clkc CLKID_AOCLK_GATE>,
+							 <&clkc CLKID_CTS_AMCLK>,
+							 <&clkc CLKID_MIXER_IFACE>,
+							 <&clkc CLKID_I2S_SPDIF>,
+							 <&aiu AIU_AOCLK_DIV_GATE>,
+							 <&aiu AIU_AOCLK_BASIC_DIV>,
+							 <&aiu AIU_AOCLK_MORE_DIV>,
+							 <&aiu AIU_LRCLK_DIV>;
+			clock-names = "pclk",
+										"i2s_pclk",
+										"i2s_aoclk",
+										"i2s_mclk",
+										"i2s_mixer",
+										"i2s_input_clk",
+										"i2s_aoclk_div_gate",
+										"i2s_aoclk_basic_div",
+										"i2s_aoclk_more_div",
+										"i2s_lrclk_div";
+			resets = <&reset RESET_AIU>;
+		};
diff --git a/include/dt-bindings/sound/meson-audin.h b/include/dt-bindings/sound/meson-audin.h
new file mode 100644
index 000000000000..30c2fe218ab4
--- /dev/null
+++ b/include/dt-bindings/sound/meson-audin.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __DT_MESON_AUDIN_H
+#define __DT_MESON_AUDIN_H
+
+#define CPU_AUDIN_TODDR_0	0
+#define CPU_AUDIN_TODDR_1	1
+#define CPU_AUDIN_TODDR_2	2
+#define CPU_I2S_DECODER		3
+
+#endif /* __DT_MESON_AUDIN_H */
-- 
2.39.5


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