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From: Sohil Mehta <sohil.mehta@intel.com>
To: x86@kernel.org, Dave Hansen <dave.hansen@linux.intel.com>,
	Tony Luck <tony.luck@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Namhyung Kim <namhyung@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@kernel.org>, Ian Rogers <irogers@google.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	Kan Liang <kan.liang@linux.intel.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Borislav Petkov <bp@alien8.de>, "H . Peter Anvin" <hpa@zytor.com>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Len Brown <lenb@kernel.org>, Andy Lutomirski <luto@kernel.org>,
	Viresh Kumar <viresh.kumar@linaro.org>,
	Fenghua Yu <fenghua.yu@intel.com>,
	Jean Delvare <jdelvare@suse.com>,
	Guenter Roeck <linux@roeck-us.net>,
	Zhang Rui <rui.zhang@intel.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	David Laight <david.laight.linux@gmail.com>,
	Sohil Mehta <sohil.mehta@intel.com>,
	linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-acpi@vger.kernel.org, linux-pm@vger.kernel.org,
	linux-hwmon@vger.kernel.org
Subject: [PATCH v2 05/17] x86/cpu/intel: Fix page copy performance for extended Families
Date: Tue, 11 Feb 2025 19:43:55 +0000	[thread overview]
Message-ID: <20250211194407.2577252-6-sohil.mehta@intel.com> (raw)
In-Reply-To: <20250211194407.2577252-1-sohil.mehta@intel.com>

X86_FEATURE_REP_GOOD is a linux defined feature flag to track whether
fast string operations should be used for copy_page(). It is also used
as a backup alternative for clear_page() if enhanced fast string
operations (ERMS) are not available.

Currently, the flag is only set for Family 6 processors. Extend the
check to include upcoming processors in Family 18 and 19.

It is uncertain whether X86_FEATURE_REP_GOOD should be set for Family 15
(Pentium 4) as well. Commit 185f3b9da24c ("x86: make intel.c have 64-bit
support code") that originally set the flag also set the
x86_cache_alignment preference for Family 15 processors in the same
commit. The omission of the Family 15 may have been intentional.

Also, move the check before a related check in early_init_intel() to
avoid resetting the flag.

Signed-off-by: Sohil Mehta <sohil.mehta@intel.com>

---

v2: Separate out the REP_GOOD (copy page) specific change into a
separate commit.

From the archives, it wasn't exactly clear why the set_cpu_cap() and
clear_cpu_cap() calls for X86_FEATURE_REP_GOOD are in distinct
locations. Also, why there is a difference between 32-bit and 64-bit.
Any insight there would be useful. For now, I have kept the change
minimal based on my limited understanding.

---
 arch/x86/kernel/cpu/intel.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index e5f34a90963e..4f8b02cbe8c5 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -297,6 +297,14 @@ static void early_init_intel(struct cpuinfo_x86 *c)
 	    c->x86_vfm <= INTEL_CORE_YONAH)
 		clear_cpu_cap(c, X86_FEATURE_PAT);
 
+	/*
+	 * Modern CPUs are generally expected to have a sane fast string
+	 * implementation. However, the BIOS may disable it on certain CPUs
+	 * via the architectural FAST_STRING bit.
+	 */
+	if (IS_ENABLED(CONFIG_X86_64) && (c->x86 == 6 || c->x86 > 15))
+		set_cpu_cap(c, X86_FEATURE_REP_GOOD);
+
 	/*
 	 * If fast string is not enabled in IA32_MISC_ENABLE for any reason,
 	 * clear the fast string and enhanced fast string CPU capabilities.
@@ -556,8 +564,6 @@ static void init_intel(struct cpuinfo_x86 *c)
 #ifdef CONFIG_X86_64
 	if (c->x86 == 15)
 		c->x86_cache_alignment = c->x86_clflush_size * 2;
-	if (c->x86 == 6)
-		set_cpu_cap(c, X86_FEATURE_REP_GOOD);
 #else
 	/*
 	 * Names for the Pentium II/Celeron processors
-- 
2.43.0


  parent reply	other threads:[~2025-02-11 19:46 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-11 19:43 [PATCH v2 00/17] Prepare for new Intel Family numbers Sohil Mehta
2025-02-11 19:43 ` [PATCH v2 01/17] x86/smpboot: Remove confusing quirk usage in INIT delay Sohil Mehta
2025-02-11 19:43 ` [PATCH v2 02/17] x86/smpboot: Fix INIT delay optimization for extended Intel Families Sohil Mehta
2025-02-11 20:10   ` Dave Hansen
2025-02-11 20:20     ` Sohil Mehta
2025-02-11 19:43 ` [PATCH v2 03/17] x86/apic: Fix 32-bit APIC initialization " Sohil Mehta
2025-02-11 19:43 ` [PATCH v2 04/17] x86/cpu/intel: Fix the movsl alignment preference for extended Families Sohil Mehta
2025-02-11 20:26   ` Dave Hansen
2025-02-11 21:45     ` David Laight
2025-02-11 19:43 ` Sohil Mehta [this message]
2025-02-11 20:53   ` [PATCH v2 05/17] x86/cpu/intel: Fix page copy performance " Dave Hansen
2025-02-12  0:54     ` Andrew Cooper
2025-02-12 21:19       ` Sohil Mehta
2025-02-13 23:02         ` Andrew Cooper
2025-02-14  0:29           ` Sohil Mehta
2025-02-11 19:43 ` [PATCH v2 06/17] cpufreq: Fix the efficient idle check for Intel " Sohil Mehta
2025-02-12  5:35   ` Zhang, Rui
2025-02-13 18:49     ` Sohil Mehta
2025-02-14  2:03       ` Zhang, Rui
2025-02-11 19:43 ` [PATCH v2 07/17] hwmon: Fix Intel Family-model checks to include " Sohil Mehta
2025-02-11 20:58   ` Dave Hansen
2025-02-11 21:38     ` Sohil Mehta
2025-02-12 13:43       ` Zhang, Rui
2025-02-12 16:57         ` Dave Hansen
2025-02-14  2:23           ` Zhang, Rui
2025-02-12 13:10     ` Zhang, Rui
2025-02-11 19:43 ` [PATCH v2 08/17] x86/microcode: Update the Intel processor flag scan check Sohil Mehta
2025-02-11 21:00   ` Dave Hansen
2025-02-11 19:43 ` [PATCH v2 09/17] x86/mtrr: Modify a x86_model check to an Intel VFM check Sohil Mehta
2025-02-11 21:00   ` Dave Hansen
2025-02-11 19:44 ` [PATCH v2 10/17] x86/cpu/intel: Replace early Family 6 checks with VFM ones Sohil Mehta
2025-02-11 21:03   ` Dave Hansen
2025-02-11 19:44 ` [PATCH v2 11/17] x86/cpu/intel: Replace Family 15 " Sohil Mehta
2025-02-11 21:03   ` Dave Hansen
2025-02-11 19:44 ` [PATCH v2 12/17] x86/cpu/intel: Replace Family 5 model " Sohil Mehta
2025-02-11 21:06   ` Dave Hansen
2025-02-11 19:44 ` [PATCH v2 13/17] x86/pat: Replace Intel x86_model " Sohil Mehta
2025-02-11 21:09   ` Dave Hansen
2025-02-11 21:42     ` Sohil Mehta
2025-02-11 19:44 ` [PATCH v2 14/17] x86/acpi/cstate: Improve Intel Family model checks Sohil Mehta
2025-02-11 21:20   ` Dave Hansen
2025-02-11 19:44 ` [PATCH v2 15/17] x86/cpu/intel: Bound the non-architectural constant_tsc " Sohil Mehta
2025-02-11 21:41   ` Dave Hansen
2025-02-12  0:45     ` Sohil Mehta
2025-02-11 19:44 ` [PATCH v2 16/17] perf/x86: Simplify P6 PMU initialization Sohil Mehta
2025-02-11 19:44 ` [PATCH v2 17/17] perf/x86/p4: Replace Pentium 4 model checks with VFM ones Sohil Mehta

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