From: Dave Hansen <dave.hansen@intel.com>
To: Sohil Mehta <sohil.mehta@intel.com>,
x86@kernel.org, Dave Hansen <dave.hansen@linux.intel.com>,
Tony Luck <tony.luck@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@kernel.org>, Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Kan Liang <kan.liang@linux.intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
Borislav Petkov <bp@alien8.de>, "H . Peter Anvin" <hpa@zytor.com>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Len Brown <lenb@kernel.org>, Andy Lutomirski <luto@kernel.org>,
Viresh Kumar <viresh.kumar@linaro.org>,
Fenghua Yu <fenghua.yu@intel.com>,
Jean Delvare <jdelvare@suse.com>,
Guenter Roeck <linux@roeck-us.net>,
Zhang Rui <rui.zhang@intel.com>,
Andrew Cooper <andrew.cooper3@citrix.com>,
David Laight <david.laight.linux@gmail.com>,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-acpi@vger.kernel.org, linux-pm@vger.kernel.org,
linux-hwmon@vger.kernel.org
Subject: Re: [PATCH v2 04/17] x86/cpu/intel: Fix the movsl alignment preference for extended Families
Date: Tue, 11 Feb 2025 12:26:48 -0800 [thread overview]
Message-ID: <5b954a96-1034-467d-a5dc-3d3f7bc112a1@intel.com> (raw)
In-Reply-To: <20250211194407.2577252-5-sohil.mehta@intel.com>
We should really rename intel_workarounds() to make it more clear that
it's 32-bit only. But I digress...
On 2/11/25 11:43, Sohil Mehta wrote:
> The alignment preference for 32-bit movsl based bulk memory move has
> been 8-byte for a long time. However this preference is only set for
> Family 6 and 15 processors.
>
> Extend the preference to upcoming Family numbers 18 and 19 to maintain
> legacy behavior. Also, use a VFM based check instead of switching based
> on Family numbers. Refresh the comment to reflect the new check.
"Legacy behavior" is not important here. If anyone is running 32-bit
kernel binaries on their brand new CPUs they (as far as I know) have a
few screws loose. They don't care about performance or security and we
shouldn't care _for_ them.
If the code yielded the "wrong" movsl_mask.mask for 18/19, it wouldn't
matter one bit.
The thing that _does_ matter is someone auditing to figure out whether
the code comprehends families>15 or whether it would break in horrible
ways. The new check is shorter and it's more obvious that it will work
forever.
Acked-by: Dave Hansen <dave.hansen@linux.intel.com>
next prev parent reply other threads:[~2025-02-11 20:26 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-11 19:43 [PATCH v2 00/17] Prepare for new Intel Family numbers Sohil Mehta
2025-02-11 19:43 ` [PATCH v2 01/17] x86/smpboot: Remove confusing quirk usage in INIT delay Sohil Mehta
2025-02-11 19:43 ` [PATCH v2 02/17] x86/smpboot: Fix INIT delay optimization for extended Intel Families Sohil Mehta
2025-02-11 20:10 ` Dave Hansen
2025-02-11 20:20 ` Sohil Mehta
2025-02-11 19:43 ` [PATCH v2 03/17] x86/apic: Fix 32-bit APIC initialization " Sohil Mehta
2025-02-11 19:43 ` [PATCH v2 04/17] x86/cpu/intel: Fix the movsl alignment preference for extended Families Sohil Mehta
2025-02-11 20:26 ` Dave Hansen [this message]
2025-02-11 21:45 ` David Laight
2025-02-11 19:43 ` [PATCH v2 05/17] x86/cpu/intel: Fix page copy performance " Sohil Mehta
2025-02-11 20:53 ` Dave Hansen
2025-02-12 0:54 ` Andrew Cooper
2025-02-12 21:19 ` Sohil Mehta
2025-02-13 23:02 ` Andrew Cooper
2025-02-14 0:29 ` Sohil Mehta
2025-02-11 19:43 ` [PATCH v2 06/17] cpufreq: Fix the efficient idle check for Intel " Sohil Mehta
2025-02-12 5:35 ` Zhang, Rui
2025-02-13 18:49 ` Sohil Mehta
2025-02-14 2:03 ` Zhang, Rui
2025-02-11 19:43 ` [PATCH v2 07/17] hwmon: Fix Intel Family-model checks to include " Sohil Mehta
2025-02-11 20:58 ` Dave Hansen
2025-02-11 21:38 ` Sohil Mehta
2025-02-12 13:43 ` Zhang, Rui
2025-02-12 16:57 ` Dave Hansen
2025-02-14 2:23 ` Zhang, Rui
2025-02-12 13:10 ` Zhang, Rui
2025-02-11 19:43 ` [PATCH v2 08/17] x86/microcode: Update the Intel processor flag scan check Sohil Mehta
2025-02-11 21:00 ` Dave Hansen
2025-02-11 19:43 ` [PATCH v2 09/17] x86/mtrr: Modify a x86_model check to an Intel VFM check Sohil Mehta
2025-02-11 21:00 ` Dave Hansen
2025-02-11 19:44 ` [PATCH v2 10/17] x86/cpu/intel: Replace early Family 6 checks with VFM ones Sohil Mehta
2025-02-11 21:03 ` Dave Hansen
2025-02-11 19:44 ` [PATCH v2 11/17] x86/cpu/intel: Replace Family 15 " Sohil Mehta
2025-02-11 21:03 ` Dave Hansen
2025-02-11 19:44 ` [PATCH v2 12/17] x86/cpu/intel: Replace Family 5 model " Sohil Mehta
2025-02-11 21:06 ` Dave Hansen
2025-02-11 19:44 ` [PATCH v2 13/17] x86/pat: Replace Intel x86_model " Sohil Mehta
2025-02-11 21:09 ` Dave Hansen
2025-02-11 21:42 ` Sohil Mehta
2025-02-11 19:44 ` [PATCH v2 14/17] x86/acpi/cstate: Improve Intel Family model checks Sohil Mehta
2025-02-11 21:20 ` Dave Hansen
2025-02-11 19:44 ` [PATCH v2 15/17] x86/cpu/intel: Bound the non-architectural constant_tsc " Sohil Mehta
2025-02-11 21:41 ` Dave Hansen
2025-02-12 0:45 ` Sohil Mehta
2025-02-11 19:44 ` [PATCH v2 16/17] perf/x86: Simplify P6 PMU initialization Sohil Mehta
2025-02-11 19:44 ` [PATCH v2 17/17] perf/x86/p4: Replace Pentium 4 model checks with VFM ones Sohil Mehta
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