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From: niravkumar.l.rabara@intel.com
To: Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>
Cc: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>,
	nirav.rabara@altera.com, devicetree@vger.kernel.org,
	linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
	Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Subject: [PATCH v3 2/2] arm64: dts: socfpga: agilex5: add clock-names property to nand node
Date: Wed, 12 Feb 2025 19:25:35 +0800	[thread overview]
Message-ID: <20250212112535.2674256-3-niravkumar.l.rabara@intel.com> (raw)
In-Reply-To: <20250212112535.2674256-1-niravkumar.l.rabara@intel.com>

From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>

Add required clock-names property to the nand node.

Fixes: 2d599bc43813 (arm64: dts: agilex5: add initial support for Intel Agilex5 SoCFPGA)
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index 51c6e19e40b8..27f75e1bc8eb 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -271,6 +271,7 @@ nand: nand-controller@10b80000 {
 			#size-cells = <0>;
 			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clkmgr AGILEX5_NAND_NF_CLK>;
+			clock-names = "nf_clk";
 			cdns,board-delay-ps = <4830>;
 			status = "disabled";
 		};
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: niravkumar.l.rabara@intel.com
To: Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>
Cc: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>,
	nirav.rabara@altera.com, devicetree@vger.kernel.org,
	linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
	Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Subject: [PATCH v3 2/2] arm64: dts: socfpga: agilex5: add clock-names property to nand node
Date: Wed, 12 Feb 2025 19:25:35 +0800	[thread overview]
Message-ID: <20250212112535.2674256-3-niravkumar.l.rabara@intel.com> (raw)
In-Reply-To: <20250212112535.2674256-1-niravkumar.l.rabara@intel.com>

From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>

Add required clock-names property to the nand node.

Fixes: 2d599bc43813 (arm64: dts: agilex5: add initial support for Intel Agilex5 SoCFPGA)
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index 51c6e19e40b8..27f75e1bc8eb 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -271,6 +271,7 @@ nand: nand-controller@10b80000 {
 			#size-cells = <0>;
 			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clkmgr AGILEX5_NAND_NF_CLK>;
+			clock-names = "nf_clk";
 			cdns,board-delay-ps = <4830>;
 			status = "disabled";
 		};
-- 
2.25.1


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  parent reply	other threads:[~2025-02-12 11:29 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-12 11:25 [PATCH v3 0/2] add clock-names property to nand node niravkumar.l.rabara
2025-02-12 11:25 ` niravkumar.l.rabara
2025-02-12 11:25 ` [PATCH v3 1/2] dt-bindings: mtd: cadence: document required clock-names niravkumar.l.rabara
2025-02-12 11:25   ` niravkumar.l.rabara
2025-02-12 11:25 ` niravkumar.l.rabara [this message]
2025-02-12 11:25   ` [PATCH v3 2/2] arm64: dts: socfpga: agilex5: add clock-names property to nand node niravkumar.l.rabara
2025-02-14 18:25 ` [PATCH v3 0/2] " Miquel Raynal
2025-02-14 18:25   ` Miquel Raynal

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