[koverstreet-bcachefs:time_stats_sched 62/63] include/uapi/linux/bits.h:9:19: warning: right shift count >= width of type

[koverstreet-bcachefs:time_stats_sched 62/63] include/uapi/linux/bits.h:9:19: warning: right shift count >= width of type

[kernel test robot]

tree:   https://github.com/koverstreet/bcachefs time_stats_sched
head:   d9b1e57f3b38d16fdd7177f3b9636dcbb4c749ed
commit: d88e92952e4e9a1f2a3c82712dec611043885ab1 [62/63] trace_sched_wakeup_backtrace
config: riscv-randconfig-r073-20250213 (https://download.01.org/0day-ci/archive/20250213/202502132010.skykaB4f-lkp@intel.com/config)
compiler: riscv32-linux-gcc (GCC) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250213/202502132010.skykaB4f-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202502132010.skykaB4f-lkp@intel.com/

All warnings (new ones prefixed by >>):

   In file included from include/linux/bits.h:7,
                    from include/linux/ratelimit_types.h:5,
                    from include/linux/printk.h:9,
                    from include/asm-generic/bug.h:22,
                    from arch/riscv/include/asm/bug.h:83,
                    from include/linux/bug.h:5,
                    from arch/riscv/include/asm/cmpxchg.h:9,
                    from arch/riscv/include/asm/barrier.h:14,
                    from include/linux/list.h:11,
                    from include/linux/wait.h:7,
                    from include/linux/wait_bit.h:8,
                    from include/linux/fs.h:6,
                    from include/linux/highmem.h:5,
                    from kernel/sched/core.c:10:
   kernel/sched/core.c: In function 'try_to_wake_up':
>> include/uapi/linux/bits.h:9:19: warning: right shift count >= width of type [-Wshift-count-overflow]
       9 |          (~_UL(0) >> (__BITS_PER_LONG - 1 - (h))))
         |                   ^~
   include/linux/bits.h:34:38: note: in expansion of macro '__GENMASK'
      34 |         (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
         |                                      ^~~~~~~~~
   arch/riscv/include/asm/cmpxchg.h:32:32: note: in expansion of macro 'GENMASK'
      32 |                 ulong __mask = GENMASK(((sizeof(*p)) * BITS_PER_BYTE) - 1, 0)   \
         |                                ^~~~~~~
   arch/riscv/include/asm/cmpxchg.h:74:17: note: in expansion of macro '__arch_xchg_masked'
      74 |                 __arch_xchg_masked(sc_sfx, ".b" swap_sfx,               \
         |                 ^~~~~~~~~~~~~~~~~~
   arch/riscv/include/asm/cmpxchg.h:108:9: note: in expansion of macro '_arch_xchg'
     108 |         _arch_xchg(ptr, x, ".rl", ".aqrl", "", RISCV_FULL_BARRIER, "")
         |         ^~~~~~~~~~
   include/linux/atomic/atomic-arch-fallback.h:12:18: note: in expansion of macro 'arch_xchg'
      12 | #define raw_xchg arch_xchg
         |                  ^~~~~~~~~
   include/linux/atomic/atomic-instrumented.h:4758:9: note: in expansion of macro 'raw_xchg'
    4758 |         raw_xchg(__ai_ptr, __VA_ARGS__); \
         |         ^~~~~~~~
   kernel/sched/core.c:4226:28: note: in expansion of macro 'xchg'
    4226 |             (sleep_start = xchg(&p->sleep_timestamp, 0)))
         |                            ^~~~
>> include/uapi/linux/bits.h:9:19: warning: right shift count >= width of type [-Wshift-count-overflow]
       9 |          (~_UL(0) >> (__BITS_PER_LONG - 1 - (h))))
         |                   ^~
   include/linux/bits.h:34:38: note: in expansion of macro '__GENMASK'
      34 |         (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
         |                                      ^~~~~~~~~
   arch/riscv/include/asm/cmpxchg.h:32:32: note: in expansion of macro 'GENMASK'
      32 |                 ulong __mask = GENMASK(((sizeof(*p)) * BITS_PER_BYTE) - 1, 0)   \
         |                                ^~~~~~~
   arch/riscv/include/asm/cmpxchg.h:79:17: note: in expansion of macro '__arch_xchg_masked'
      79 |                 __arch_xchg_masked(sc_sfx, ".h" swap_sfx,               \
         |                 ^~~~~~~~~~~~~~~~~~
   arch/riscv/include/asm/cmpxchg.h:108:9: note: in expansion of macro '_arch_xchg'
     108 |         _arch_xchg(ptr, x, ".rl", ".aqrl", "", RISCV_FULL_BARRIER, "")
         |         ^~~~~~~~~~
   include/linux/atomic/atomic-arch-fallback.h:12:18: note: in expansion of macro 'arch_xchg'
      12 | #define raw_xchg arch_xchg
         |                  ^~~~~~~~~
   include/linux/atomic/atomic-instrumented.h:4758:9: note: in expansion of macro 'raw_xchg'
    4758 |         raw_xchg(__ai_ptr, __VA_ARGS__); \
         |         ^~~~~~~~
   kernel/sched/core.c:4226:28: note: in expansion of macro 'xchg'
    4226 |             (sleep_start = xchg(&p->sleep_timestamp, 0)))
         |                            ^~~~
   kernel/sched/core.c: Assembler messages:
   kernel/sched/core.c:4226: Error: unrecognized opcode `amoswap.d.aqrl a4,a4,0(a3)'


vim +9 include/uapi/linux/bits.h

3c7a8e190bc580 Paolo Bonzini 2023-12-12   6  
3c7a8e190bc580 Paolo Bonzini 2023-12-12   7  #define __GENMASK(h, l) \
3c7a8e190bc580 Paolo Bonzini 2023-12-12   8          (((~_UL(0)) - (_UL(1) << (l)) + 1) & \
3c7a8e190bc580 Paolo Bonzini 2023-12-12  @9           (~_UL(0) >> (__BITS_PER_LONG - 1 - (h))))
3c7a8e190bc580 Paolo Bonzini 2023-12-12  10  

:::::: The code at line 9 was first introduced by commit
:::::: 3c7a8e190bc580813ddd9259f62971c8d2a6b5ad uapi: introduce uapi-friendly macros for GENMASK

:::::: TO: Paolo Bonzini <pbonzini@redhat.com>
:::::: CC: Paolo Bonzini <pbonzini@redhat.com>

-- 
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https://github.com/intel/lkp-tests/wiki