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From: Eric Biggers <ebiggers@kernel.org>
To: linux-kernel@vger.kernel.org
Cc: linux-crypto@vger.kernel.org, linux-riscv@lists.infradead.org,
	Zhihang Shao <zhihang.shao.iscas@gmail.com>,
	Ard Biesheuvel <ardb@kernel.org>,
	Xiao Wang <xiao.w.wang@intel.com>,
	Charlie Jenkins <charlie@rivosinc.com>
Subject: [PATCH 0/4] RISC-V CRC optimizations
Date: Sun, 16 Feb 2025 14:55:26 -0800	[thread overview]
Message-ID: <20250216225530.306980-1-ebiggers@kernel.org> (raw)

This patchset is a replacement for
"[PATCH v4] riscv: Optimize crct10dif with Zbc extension"
(https://lore.kernel.org/r/20250211071101.181652-1-zhihang.shao.iscas@gmail.com/).
It adopts the approach that I'm taking for x86 where code is shared
among CRC variants.  It replaces the existing Zbc optimized CRC32
functions, then adds Zbc optimized CRC-T10DIF and CRC64 functions.

This new code should be significantly faster than the current Zbc
optimized CRC32 code and the previously proposed CRC-T10DIF code.  It
uses "folding" instead of just Barrett reduction, and it also implements
Barrett reduction more efficiently.

This applies to crc-next at
https://git.kernel.org/pub/scm/linux/kernel/git/ebiggers/linux.git/log/?h=crc-next.
It depends on other patches that are queued there for 6.15, so I plan to
take it through there if there are no objections.

Tested with crc_kunit in QEMU (set CONFIG_CRC_KUNIT_TEST=y and
CONFIG_CRC_BENCHMARK=y), both 32-bit and 64-bit.  I don't have real Zbc
capable hardware to benchmark this on, but the new code should work very
well; similar optimizations work very well on other architectures.

Eric Biggers (4):
  riscv/crc: add "template" for Zbc optimized CRC functions
  riscv/crc32: reimplement the CRC32 functions using new template
  riscv/crc-t10dif: add Zbc optimized CRC-T10DIF function
  riscv/crc64: add Zbc optimized CRC64 functions

 arch/riscv/Kconfig                  |   2 +
 arch/riscv/lib/Makefile             |   5 +
 arch/riscv/lib/crc-clmul-consts.h   | 122 +++++++++++
 arch/riscv/lib/crc-clmul-template.h | 265 ++++++++++++++++++++++++
 arch/riscv/lib/crc-clmul.h          |  23 +++
 arch/riscv/lib/crc-t10dif.c         |  24 +++
 arch/riscv/lib/crc16_msb.c          |  18 ++
 arch/riscv/lib/crc32-riscv.c        | 310 ----------------------------
 arch/riscv/lib/crc32.c              |  53 +++++
 arch/riscv/lib/crc32_lsb.c          |  18 ++
 arch/riscv/lib/crc32_msb.c          |  18 ++
 arch/riscv/lib/crc64.c              |  34 +++
 arch/riscv/lib/crc64_lsb.c          |  18 ++
 arch/riscv/lib/crc64_msb.c          |  18 ++
 scripts/gen-crc-consts.py           |  55 ++++-
 15 files changed, 672 insertions(+), 311 deletions(-)
 create mode 100644 arch/riscv/lib/crc-clmul-consts.h
 create mode 100644 arch/riscv/lib/crc-clmul-template.h
 create mode 100644 arch/riscv/lib/crc-clmul.h
 create mode 100644 arch/riscv/lib/crc-t10dif.c
 create mode 100644 arch/riscv/lib/crc16_msb.c
 delete mode 100644 arch/riscv/lib/crc32-riscv.c
 create mode 100644 arch/riscv/lib/crc32.c
 create mode 100644 arch/riscv/lib/crc32_lsb.c
 create mode 100644 arch/riscv/lib/crc32_msb.c
 create mode 100644 arch/riscv/lib/crc64.c
 create mode 100644 arch/riscv/lib/crc64_lsb.c
 create mode 100644 arch/riscv/lib/crc64_msb.c


base-commit: cf1ea3a7c1f63cba7d1dd313ee3accde0c0c8988
-- 
2.48.1


WARNING: multiple messages have this Message-ID (diff)
From: Eric Biggers <ebiggers@kernel.org>
To: linux-kernel@vger.kernel.org
Cc: linux-crypto@vger.kernel.org, linux-riscv@lists.infradead.org,
	Zhihang Shao <zhihang.shao.iscas@gmail.com>,
	Ard Biesheuvel <ardb@kernel.org>,
	Xiao Wang <xiao.w.wang@intel.com>,
	Charlie Jenkins <charlie@rivosinc.com>
Subject: [PATCH 0/4] RISC-V CRC optimizations
Date: Sun, 16 Feb 2025 14:55:26 -0800	[thread overview]
Message-ID: <20250216225530.306980-1-ebiggers@kernel.org> (raw)

This patchset is a replacement for
"[PATCH v4] riscv: Optimize crct10dif with Zbc extension"
(https://lore.kernel.org/r/20250211071101.181652-1-zhihang.shao.iscas@gmail.com/).
It adopts the approach that I'm taking for x86 where code is shared
among CRC variants.  It replaces the existing Zbc optimized CRC32
functions, then adds Zbc optimized CRC-T10DIF and CRC64 functions.

This new code should be significantly faster than the current Zbc
optimized CRC32 code and the previously proposed CRC-T10DIF code.  It
uses "folding" instead of just Barrett reduction, and it also implements
Barrett reduction more efficiently.

This applies to crc-next at
https://git.kernel.org/pub/scm/linux/kernel/git/ebiggers/linux.git/log/?h=crc-next.
It depends on other patches that are queued there for 6.15, so I plan to
take it through there if there are no objections.

Tested with crc_kunit in QEMU (set CONFIG_CRC_KUNIT_TEST=y and
CONFIG_CRC_BENCHMARK=y), both 32-bit and 64-bit.  I don't have real Zbc
capable hardware to benchmark this on, but the new code should work very
well; similar optimizations work very well on other architectures.

Eric Biggers (4):
  riscv/crc: add "template" for Zbc optimized CRC functions
  riscv/crc32: reimplement the CRC32 functions using new template
  riscv/crc-t10dif: add Zbc optimized CRC-T10DIF function
  riscv/crc64: add Zbc optimized CRC64 functions

 arch/riscv/Kconfig                  |   2 +
 arch/riscv/lib/Makefile             |   5 +
 arch/riscv/lib/crc-clmul-consts.h   | 122 +++++++++++
 arch/riscv/lib/crc-clmul-template.h | 265 ++++++++++++++++++++++++
 arch/riscv/lib/crc-clmul.h          |  23 +++
 arch/riscv/lib/crc-t10dif.c         |  24 +++
 arch/riscv/lib/crc16_msb.c          |  18 ++
 arch/riscv/lib/crc32-riscv.c        | 310 ----------------------------
 arch/riscv/lib/crc32.c              |  53 +++++
 arch/riscv/lib/crc32_lsb.c          |  18 ++
 arch/riscv/lib/crc32_msb.c          |  18 ++
 arch/riscv/lib/crc64.c              |  34 +++
 arch/riscv/lib/crc64_lsb.c          |  18 ++
 arch/riscv/lib/crc64_msb.c          |  18 ++
 scripts/gen-crc-consts.py           |  55 ++++-
 15 files changed, 672 insertions(+), 311 deletions(-)
 create mode 100644 arch/riscv/lib/crc-clmul-consts.h
 create mode 100644 arch/riscv/lib/crc-clmul-template.h
 create mode 100644 arch/riscv/lib/crc-clmul.h
 create mode 100644 arch/riscv/lib/crc-t10dif.c
 create mode 100644 arch/riscv/lib/crc16_msb.c
 delete mode 100644 arch/riscv/lib/crc32-riscv.c
 create mode 100644 arch/riscv/lib/crc32.c
 create mode 100644 arch/riscv/lib/crc32_lsb.c
 create mode 100644 arch/riscv/lib/crc32_msb.c
 create mode 100644 arch/riscv/lib/crc64.c
 create mode 100644 arch/riscv/lib/crc64_lsb.c
 create mode 100644 arch/riscv/lib/crc64_msb.c


base-commit: cf1ea3a7c1f63cba7d1dd313ee3accde0c0c8988
-- 
2.48.1


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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

             reply	other threads:[~2025-02-16 23:00 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-16 22:55 Eric Biggers [this message]
2025-02-16 22:55 ` [PATCH 0/4] RISC-V CRC optimizations Eric Biggers
2025-02-16 22:55 ` [PATCH 1/4] riscv/crc: add "template" for Zbc optimized CRC functions Eric Biggers
2025-02-16 22:55   ` Eric Biggers
2025-02-16 22:55 ` [PATCH 2/4] riscv/crc32: reimplement the CRC32 functions using new template Eric Biggers
2025-02-16 22:55   ` Eric Biggers
2025-02-16 22:55 ` [PATCH 3/4] riscv/crc-t10dif: add Zbc optimized CRC-T10DIF function Eric Biggers
2025-02-16 22:55   ` Eric Biggers
2025-02-16 22:55 ` [PATCH 4/4] riscv/crc64: add Zbc optimized CRC64 functions Eric Biggers
2025-02-16 22:55   ` Eric Biggers
2025-02-24 18:06 ` [PATCH 0/4] RISC-V CRC optimizations Eric Biggers
2025-02-24 18:06   ` Eric Biggers
2025-03-02 18:56   ` Björn Töpel
2025-03-02 18:56     ` Björn Töpel
2025-03-02 22:04     ` Eric Biggers
2025-03-02 22:04       ` Eric Biggers
2025-03-08 12:58       ` Ignacio Encinas Rubio
2025-03-08 12:58         ` Ignacio Encinas Rubio
2025-03-10 12:34         ` Alexandre Ghiti
2025-03-10 12:34           ` Alexandre Ghiti
2025-03-10 12:44       ` Alexandre Ghiti
2025-03-10 12:44         ` Alexandre Ghiti
2025-03-03  6:53     ` Zhihang Shao
2025-03-03  6:53       ` Zhihang Shao

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