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* [RESEND PATCH] clk: socfpga: stratix10: Optimize local variables
@ 2025-02-19 10:44 Thorsten Blum
  2025-02-19 12:42 ` Dinh Nguyen
  0 siblings, 1 reply; 2+ messages in thread
From: Thorsten Blum @ 2025-02-19 10:44 UTC (permalink / raw)
  To: Dinh Nguyen, Michael Turquette, Stephen Boyd
  Cc: Thorsten Blum, Krzysztof Kozlowski, linux-clk, linux-kernel

Since readl() returns a u32, the local variable reg can also have the
data type u32. Furthermore, mdiv and refdiv are derived from reg and can
also be a u32.

Since do_div() casts the divisor to u32 anyway, changing the data type
of refdiv to u32 removes the following Coccinelle/coccicheck warning
reported by do_div.cocci:

  WARNING: do_div() does a 64-by-32 division, please consider using div64_ul instead

Compile-tested only.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
---
 drivers/clk/socfpga/clk-pll-s10.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/socfpga/clk-pll-s10.c b/drivers/clk/socfpga/clk-pll-s10.c
index 1d82737befd3..a88c212bda12 100644
--- a/drivers/clk/socfpga/clk-pll-s10.c
+++ b/drivers/clk/socfpga/clk-pll-s10.c
@@ -83,9 +83,9 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hwclk,
 					 unsigned long parent_rate)
 {
 	struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk);
-	unsigned long mdiv;
-	unsigned long refdiv;
-	unsigned long reg;
+	u32 mdiv;
+	u32 refdiv;
+	u32 reg;
 	unsigned long long vco_freq;
 
 	/* read VCO1 reg for numerator and denominator */
-- 
2.48.1


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [RESEND PATCH] clk: socfpga: stratix10: Optimize local variables
  2025-02-19 10:44 [RESEND PATCH] clk: socfpga: stratix10: Optimize local variables Thorsten Blum
@ 2025-02-19 12:42 ` Dinh Nguyen
  0 siblings, 0 replies; 2+ messages in thread
From: Dinh Nguyen @ 2025-02-19 12:42 UTC (permalink / raw)
  To: Thorsten Blum, Michael Turquette, Stephen Boyd
  Cc: Krzysztof Kozlowski, linux-clk, linux-kernel

On 2/19/25 04:44, Thorsten Blum wrote:
> Since readl() returns a u32, the local variable reg can also have the
> data type u32. Furthermore, mdiv and refdiv are derived from reg and can
> also be a u32.
> 
> Since do_div() casts the divisor to u32 anyway, changing the data type
> of refdiv to u32 removes the following Coccinelle/coccicheck warning
> reported by do_div.cocci:
> 
>    WARNING: do_div() does a 64-by-32 division, please consider using div64_ul instead
> 
> Compile-tested only.
> 
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
> ---
>   drivers/clk/socfpga/clk-pll-s10.c | 6 +++---
>   1 file changed, 3 insertions(+), 3 deletions(-)
> 

Applied!

Thanks,
Dinh


^ permalink raw reply	[flat|nested] 2+ messages in thread

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2025-02-19 10:44 [RESEND PATCH] clk: socfpga: stratix10: Optimize local variables Thorsten Blum
2025-02-19 12:42 ` Dinh Nguyen

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