From: Rob Herring <robh@kernel.org>
To: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Cc: "Rafael J. Wysocki" <rafael@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Zhang Rui <rui.zhang@intel.com>,
Lukasz Luba <lukasz.luba@arm.com>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
Sebastian Reichel <sebastian.reichel@collabora.com>,
kernel@collabora.com, linux-pm@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 4/6] dt-bindings: thermal: rockchip: document otp thermal trim
Date: Wed, 19 Feb 2025 17:10:36 -0600 [thread overview]
Message-ID: <20250219231036.GA3137058-robh@kernel.org> (raw)
In-Reply-To: <20250216-rk3576-tsadc-upstream-v1-4-6ec969322a14@collabora.com>
On Sun, Feb 16, 2025 at 12:34:53AM +0100, Nicolas Frattaroli wrote:
> Several Rockchip SoCs, such as the RK3576, can store calibration trim
> data for thermal sensors in OTP cells. This capability should be
> documented.
Is several most or a minority as this change is enabled for everyone.
>
> Such a rockchip thermal sensor may reference cell handles that store
> both a chip-wide trim for all the sensors, as well as cell handles
> for each individual sensor channel pointing to that specific sensor's
> trim value.
>
> Additionally, the thermal sensor may optionally reference cells which
> store the base in terms of degrees celsius and decicelsius that the trim
> is relative to.
>
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> ---
> .../bindings/thermal/rockchip-thermal.yaml | 44 ++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml
> index 49ceed68c92ce5a32ed8d4f39bd88fd052de0e80..8d27ddefcc64e29f0faab059888805802c948b41 100644
> --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml
> +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml
> @@ -40,6 +40,21 @@ properties:
> - const: tsadc
> - const: apb_pclk
>
> + nvmem-cells:
> + items:
> + - description: cell handle of the low byte of the chip fallback trim value
> + - description: cell handle of the high byte of the chip fallback trim value
> + - description: cell handle to where the trim's base temperature is stored
> + - description:
> + cell handle to where the trim's tenths of Celsius base value is stored
> +
> + nvmem-cell-names:
> + enum:
> + - trim_l
> + - trim_h
> + - trim_base
> + - trim_base_frac
> +
> resets:
> minItems: 1
> maxItems: 3
> @@ -51,6 +66,12 @@ properties:
> - const: tsadc
> - const: tsadc-phy
>
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> "#thermal-sensor-cells":
> const: 1
>
> @@ -72,6 +93,29 @@ properties:
> $ref: /schemas/types.yaml#/definitions/uint32
> enum: [0, 1]
>
> +patternProperties:
> + "^([a-z]+)@[0-9]+$":
If each node is a sensor or channel, then make that the node name.
> + type: object
> + properties:
> + reg:
> + maxItems: 1
> + description: sensor ID, a.k.a. channel number
> +
> + nvmem-cells:
> + items:
> + - description: handle of cell containing low byte of calibration data
> + - description: handle of cell containing high byte of calibration data
> +
> + nvmem-cell-names:
> + items:
> + - const: trim_l
> + - const: trim_h
> +
> + required:
> + - reg
> +
> + unevaluatedProperties: false
> +
> required:
> - compatible
> - reg
>
> --
> 2.48.1
>
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Cc: "Rafael J. Wysocki" <rafael@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Zhang Rui <rui.zhang@intel.com>,
Lukasz Luba <lukasz.luba@arm.com>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
Sebastian Reichel <sebastian.reichel@collabora.com>,
kernel@collabora.com, linux-pm@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 4/6] dt-bindings: thermal: rockchip: document otp thermal trim
Date: Wed, 19 Feb 2025 17:10:36 -0600 [thread overview]
Message-ID: <20250219231036.GA3137058-robh@kernel.org> (raw)
In-Reply-To: <20250216-rk3576-tsadc-upstream-v1-4-6ec969322a14@collabora.com>
On Sun, Feb 16, 2025 at 12:34:53AM +0100, Nicolas Frattaroli wrote:
> Several Rockchip SoCs, such as the RK3576, can store calibration trim
> data for thermal sensors in OTP cells. This capability should be
> documented.
Is several most or a minority as this change is enabled for everyone.
>
> Such a rockchip thermal sensor may reference cell handles that store
> both a chip-wide trim for all the sensors, as well as cell handles
> for each individual sensor channel pointing to that specific sensor's
> trim value.
>
> Additionally, the thermal sensor may optionally reference cells which
> store the base in terms of degrees celsius and decicelsius that the trim
> is relative to.
>
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> ---
> .../bindings/thermal/rockchip-thermal.yaml | 44 ++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml
> index 49ceed68c92ce5a32ed8d4f39bd88fd052de0e80..8d27ddefcc64e29f0faab059888805802c948b41 100644
> --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml
> +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml
> @@ -40,6 +40,21 @@ properties:
> - const: tsadc
> - const: apb_pclk
>
> + nvmem-cells:
> + items:
> + - description: cell handle of the low byte of the chip fallback trim value
> + - description: cell handle of the high byte of the chip fallback trim value
> + - description: cell handle to where the trim's base temperature is stored
> + - description:
> + cell handle to where the trim's tenths of Celsius base value is stored
> +
> + nvmem-cell-names:
> + enum:
> + - trim_l
> + - trim_h
> + - trim_base
> + - trim_base_frac
> +
> resets:
> minItems: 1
> maxItems: 3
> @@ -51,6 +66,12 @@ properties:
> - const: tsadc
> - const: tsadc-phy
>
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> "#thermal-sensor-cells":
> const: 1
>
> @@ -72,6 +93,29 @@ properties:
> $ref: /schemas/types.yaml#/definitions/uint32
> enum: [0, 1]
>
> +patternProperties:
> + "^([a-z]+)@[0-9]+$":
If each node is a sensor or channel, then make that the node name.
> + type: object
> + properties:
> + reg:
> + maxItems: 1
> + description: sensor ID, a.k.a. channel number
> +
> + nvmem-cells:
> + items:
> + - description: handle of cell containing low byte of calibration data
> + - description: handle of cell containing high byte of calibration data
> +
> + nvmem-cell-names:
> + items:
> + - const: trim_l
> + - const: trim_h
> +
> + required:
> + - reg
> +
> + unevaluatedProperties: false
> +
> required:
> - compatible
> - reg
>
> --
> 2.48.1
>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
next prev parent reply other threads:[~2025-02-19 23:15 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-15 23:34 [PATCH 0/6] RK3576 thermal sensor support, including OTP trim adjustments Nicolas Frattaroli
2025-02-15 23:34 ` Nicolas Frattaroli
2025-02-15 23:34 ` [PATCH 1/6] dt-bindings: rockchip-thermal: Add RK3576 compatible Nicolas Frattaroli
2025-02-15 23:34 ` Nicolas Frattaroli
2025-02-19 23:03 ` Rob Herring (Arm)
2025-02-19 23:03 ` Rob Herring (Arm)
2025-02-15 23:34 ` [PATCH 2/6] arm64: dts: rockchip: Add thermal nodes to RK3576 Nicolas Frattaroli
2025-02-15 23:34 ` Nicolas Frattaroli
2025-02-15 23:34 ` [PATCH 3/6] thermal: rockchip: Support RK3576 SoC in the thermal driver Nicolas Frattaroli
2025-02-15 23:34 ` Nicolas Frattaroli
2025-02-15 23:34 ` [PATCH 4/6] dt-bindings: thermal: rockchip: document otp thermal trim Nicolas Frattaroli
2025-02-15 23:34 ` Nicolas Frattaroli
2025-02-19 23:10 ` Rob Herring [this message]
2025-02-19 23:10 ` Rob Herring
2025-02-21 13:27 ` Nicolas Frattaroli
2025-02-21 13:27 ` Nicolas Frattaroli
2025-02-15 23:34 ` [PATCH 5/6] arm64: dts: rockchip: Add thermal trim OTP and tsadc nodes Nicolas Frattaroli
2025-02-15 23:34 ` Nicolas Frattaroli
2025-02-20 1:14 ` Sebastian Reichel
2025-02-20 1:14 ` Sebastian Reichel
2025-02-15 23:34 ` [PATCH 6/6] thermal: rockchip: support reading trim values from OTP Nicolas Frattaroli
2025-02-15 23:34 ` Nicolas Frattaroli
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250219231036.GA3137058-robh@kernel.org \
--to=robh@kernel.org \
--cc=conor+dt@kernel.org \
--cc=daniel.lezcano@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=heiko@sntech.de \
--cc=kernel@collabora.com \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=lukasz.luba@arm.com \
--cc=nicolas.frattaroli@collabora.com \
--cc=rafael@kernel.org \
--cc=rui.zhang@intel.com \
--cc=sebastian.reichel@collabora.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.